| Message ID | 20220516063155.1332683-3-bhupesh.sharma@linaro.org |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Fix dtbs_check warning(s) for Qualcomm QMP PHY | expand |
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml index c39ead81ecd7..60ab494df975 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml @@ -110,6 +110,18 @@ patternProperties: Each device node of QMP phy is required to have as many child nodes as the number of lanes the PHY has. properties: + reg: + minItems: 1 + maxItems: 6 + description: | + List of offset and length pairs of register sets for PHY blocks. + There are two possible cases:: + - tx, rx, pcs and pcs_misc. + - tx, rx, pcs, tx2, rx2 and pcs_misc. + + "#phy-cells": + const: 0 + "#clock-cells": enum: [ 0, 1, 2 ]
Currently the qcom,qmp-phy dt-binding doesn't describe the 'reg' and '#phy-cells' properties for the phy@ subnode. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+)