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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id m10-20020a056402430a00b0042cf43e1937sm7949927edc.75.2022.06.19.04.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jun 2022 04:33:39 -0700 (PDT) From: Krzysztof Kozlowski To: Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Anurag Kumar Vulisha , Laurent Pinchart , Michal Simek , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sean Anderson , Krzysztof Kozlowski Subject: [PATCH] dt-bindings: phy: make phy-cells description a text Date: Sun, 19 Jun 2022 13:33:25 +0200 Message-Id: <20220619113325.21396-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220619_043344_456454_BD921CAA X-CRM114-Status: UNSURE ( 9.40 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The description field is a string, so using YAML inside phy-cells description is not actually helpful. Make it a proper text. Signed-off-by: Krzysztof Kozlowski --- .../bindings/phy/mediatek,tphy.yaml | 14 ++++---- .../bindings/phy/mediatek,xsphy.yaml | 10 +++--- .../bindings/phy/xlnx,zynqmp-psgtr.yaml | 32 ++++++++----------- 3 files changed, 23 insertions(+), 33 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 4b638c1d4221..bd0e4c4915ed 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -154,14 +154,12 @@ patternProperties: "#phy-cells": const: 1 description: | - The cells contain the following arguments. - - - description: The PHY type - enum: - - PHY_TYPE_USB2 - - PHY_TYPE_USB3 - - PHY_TYPE_PCIE - - PHY_TYPE_SATA + The cells contain the following arguments:: + - The PHY type:: + - PHY_TYPE_USB2 + - PHY_TYPE_USB3 + - PHY_TYPE_PCIE + - PHY_TYPE_SATA nvmem-cells: items: diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 598fd2b95c29..7262b8e184e2 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -100,12 +100,10 @@ patternProperties: "#phy-cells": const: 1 description: | - The cells contain the following arguments. - - - description: The PHY type - enum: - - PHY_TYPE_USB2 - - PHY_TYPE_USB3 + The cells contain the following arguments:: + - The PHY type:: + - PHY_TYPE_USB2 + - PHY_TYPE_USB3 # The following optional vendor properties are only for debug or HQA test mediatek,eye-src: diff --git a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml index 79906519c652..7083eddb467c 100644 --- a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml +++ b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml @@ -18,25 +18,19 @@ properties: "#phy-cells": const: 4 description: | - The cells contain the following arguments. - - - description: The GTR lane - minimum: 0 - maximum: 3 - - description: The PHY type - enum: - - PHY_TYPE_DP - - PHY_TYPE_PCIE - - PHY_TYPE_SATA - - PHY_TYPE_SGMII - - PHY_TYPE_USB3 - - description: The PHY instance - minimum: 0 - maximum: 1 # for DP, SATA or USB - maximum: 3 # for PCIE or SGMII - - description: The reference clock number - minimum: 0 - maximum: 3 + The cells contain the following arguments:: + - The GTR lane (minimum:: 0, maximum:: 3) + - The PHY type:: + - PHY_TYPE_DP + - PHY_TYPE_PCIE + - PHY_TYPE_SATA + - PHY_TYPE_SGMII + - PHY_TYPE_USB3 + - The PHY instance:: + minimum:: 0 + maximum:: 1 # for DP, SATA or USB + maximum:: 3 # for PCIE or SGMII + - The reference clock number (minimum:: 0, maximum:: 3) compatible: enum: