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Fri, 9 Sep 2022 08:04:55 -0500 From: Piyush Mehta To: , , , CC: , , , , , , Piyush Mehta Subject: [PATCH] phy: xilinx: phy-zynqmp: dynamic clock support for power-save Date: Fri, 9 Sep 2022 18:34:42 +0530 Message-ID: <20220909130442.1337970-1-piyush.mehta@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT086:EE_|IA1PR12MB6210:EE_ X-MS-Office365-Filtering-Correlation-Id: 8da1e847-c0d1-44a6-db8c-08da9263e767 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: uzkO+3B5ly7oLYLvpAwH8NCPMr6N1R7iR8WJv0G4nVbuuTw/0wQkNSzH0Afbx8et+7Z9W3JgaBmB23utEZlbo1aCiXPqKwWo6vdvSuXS6yxoNofheKHSdJJ9ypHQv8g5r6AH6QVILzI+y97teKSH/5xH+PokEHe4TEkGSjREAGWo8wF6xABpmxsXquKBotU9PifBKpKzOXlmVyxQ6ftOrZZYyRObaDSl41dR+sdoiWkdJb3d0nW0T7/iipA5f5zm8l0DdoW/f+5b22UsqPMsVRbHnlGyddWNi3qzbJLnpUWgAMTkvRDelmQ+KMqq2C8zcyVfSFItXYxErY8DAgroY5IhEPVB/tOq8/SLZRt9woEYGkdeUu+0g7woA7/5N+60R/6JuQi+xjVtHYalteW2T3sFg1oAUWvYN1JZZHY7NKOnm3yycOMPcPd/bldz3WOY+x+QwUFkLias7PgUuGU/tODhEjeOg8DBIKxDNNcYyvjWwxQKJTHYIheCWnvN1dLNioz/wlnRfY7Um5yEeaO4LEGCADu9/ucd4lYAyv2DFJu4K0BL5PVwj8ok1w0mtEDqwugKcElE35EWQM/tbBqiO1ymbem1Wa8h830fUFAf5xdCziZZK/QIVWdqvqooXbL6MedR1T2tA19ZzbNEXwhnjuOk7ctdn8RxkuTTOBZV8rNJRdI++7ltlGSVuQVzJfEkM1rB1BWZpxvdYBho8Y7mUCDQ4y9+BbLbHVrBbPtqUPo/HHDHI8yVoBt2czrkG/eHtPHB2sgcfW47sCFeuLOB44NjsdH/fJa/Km6nYyrAqXGxtz7EzH8w6xjiqLGhKVxX X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(346002)(396003)(136003)(376002)(39860400002)(46966006)(40470700004)(36840700001)(36756003)(6666004)(41300700001)(26005)(40460700003)(478600001)(40480700001)(70586007)(82310400005)(2906002)(86362001)(54906003)(316002)(81166007)(110136005)(82740400003)(356005)(70206006)(2616005)(186003)(336012)(426003)(1076003)(47076005)(8676002)(44832011)(8936002)(4326008)(5660300002)(36860700001)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Sep 2022 13:05:00.7169 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8da1e847-c0d1-44a6-db8c-08da9263e767 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT086.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6210 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220909_060507_752758_85C8B689 X-CRM114-Status: GOOD ( 19.37 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Enabling clock for all the lanes, consuming power even PHY is active or not. To resolve the above issue and power saving,made clock enabled/disabled based on active PHYs on call of phy_init/phy_exit. By default clock is disabled for all the lanes. Whenever phy_init called from USB, SATA, SGMII, or display driver, it enabled the required clock for requested lane. On phy_exit cycle, it disabled clock for the active PHYs. During the suspend/resume cycle, each USB/ SATA/ SGMII/ display driver called phy_exit/phy_init individually. it disabled clock on exit, and enabled on initialization for the active PHYs. Active PHY configuration depends on the peripheral DT node status, like USB DT node status 'okay' then driver enabled clock for the USB configured lane. Signed-off-by: Piyush Mehta Acked-by: Michal Simek --- drivers/phy/xilinx/phy-zynqmp.c | 59 ++++++++------------------------- 1 file changed, 14 insertions(+), 45 deletions(-) diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c index 9be9535ad7ab..912c4defdf8d 100644 --- a/drivers/phy/xilinx/phy-zynqmp.c +++ b/drivers/phy/xilinx/phy-zynqmp.c @@ -572,6 +572,10 @@ static int xpsgtr_phy_init(struct phy *phy) mutex_lock(>r_dev->gtr_mutex); + /* Configure and enable the clock when peripheral phy_init call */ + if (clk_prepare_enable(gtr_dev->clk[gtr_phy->lane])) + goto out; + /* Skip initialization if not required. */ if (!xpsgtr_phy_init_required(gtr_phy)) goto out; @@ -616,9 +620,13 @@ static int xpsgtr_phy_init(struct phy *phy) static int xpsgtr_phy_exit(struct phy *phy) { struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy); + struct xpsgtr_dev *gtr_dev = gtr_phy->dev; gtr_phy->skip_phy_init = false; + /* Ensure that disable clock only, which configure for lane */ + clk_disable_unprepare(gtr_dev->clk[gtr_phy->lane]); + return 0; } @@ -824,15 +832,11 @@ static struct phy *xpsgtr_xlate(struct device *dev, static int __maybe_unused xpsgtr_suspend(struct device *dev) { struct xpsgtr_dev *gtr_dev = dev_get_drvdata(dev); - unsigned int i; /* Save the snapshot ICM_CFG registers. */ gtr_dev->saved_icm_cfg0 = xpsgtr_read(gtr_dev, ICM_CFG0); gtr_dev->saved_icm_cfg1 = xpsgtr_read(gtr_dev, ICM_CFG1); - for (i = 0; i < ARRAY_SIZE(gtr_dev->clk); i++) - clk_disable_unprepare(gtr_dev->clk[i]); - return 0; } @@ -842,13 +846,6 @@ static int __maybe_unused xpsgtr_resume(struct device *dev) unsigned int icm_cfg0, icm_cfg1; unsigned int i; bool skip_phy_init; - int err; - - for (i = 0; i < ARRAY_SIZE(gtr_dev->clk); i++) { - err = clk_prepare_enable(gtr_dev->clk[i]); - if (err) - goto err_clk_put; - } icm_cfg0 = xpsgtr_read(gtr_dev, ICM_CFG0); icm_cfg1 = xpsgtr_read(gtr_dev, ICM_CFG1); @@ -869,12 +866,6 @@ static int __maybe_unused xpsgtr_resume(struct device *dev) gtr_dev->phys[i].skip_phy_init = skip_phy_init; return 0; - -err_clk_put: - while (i--) - clk_disable_unprepare(gtr_dev->clk[i]); - - return err; } static const struct dev_pm_ops xpsgtr_pm_ops = { @@ -888,7 +879,6 @@ static const struct dev_pm_ops xpsgtr_pm_ops = { static int xpsgtr_get_ref_clocks(struct xpsgtr_dev *gtr_dev) { unsigned int refclk; - int ret; for (refclk = 0; refclk < ARRAY_SIZE(gtr_dev->refclk_sscs); ++refclk) { unsigned long rate; @@ -899,19 +889,14 @@ static int xpsgtr_get_ref_clocks(struct xpsgtr_dev *gtr_dev) snprintf(name, sizeof(name), "ref%u", refclk); clk = devm_clk_get_optional(gtr_dev->dev, name); if (IS_ERR(clk)) { - ret = dev_err_probe(gtr_dev->dev, PTR_ERR(clk), - "Failed to get reference clock %u\n", - refclk); - goto err_clk_put; + return dev_err_probe(gtr_dev->dev, PTR_ERR(clk), + "Failed to get ref clock %u\n", + refclk); } if (!clk) continue; - ret = clk_prepare_enable(clk); - if (ret) - goto err_clk_put; - gtr_dev->clk[refclk] = clk; /* @@ -931,18 +916,11 @@ static int xpsgtr_get_ref_clocks(struct xpsgtr_dev *gtr_dev) dev_err(gtr_dev->dev, "Invalid rate %lu for reference clock %u\n", rate, refclk); - ret = -EINVAL; - goto err_clk_put; + return -EINVAL; } } return 0; - -err_clk_put: - while (refclk--) - clk_disable_unprepare(gtr_dev->clk[refclk]); - - return ret; } static int xpsgtr_probe(struct platform_device *pdev) @@ -951,7 +929,6 @@ static int xpsgtr_probe(struct platform_device *pdev) struct xpsgtr_dev *gtr_dev; struct phy_provider *provider; unsigned int port; - unsigned int i; int ret; gtr_dev = devm_kzalloc(&pdev->dev, sizeof(*gtr_dev), GFP_KERNEL); @@ -991,8 +968,7 @@ static int xpsgtr_probe(struct platform_device *pdev) phy = devm_phy_create(&pdev->dev, np, &xpsgtr_phyops); if (IS_ERR(phy)) { dev_err(&pdev->dev, "failed to create PHY\n"); - ret = PTR_ERR(phy); - goto err_clk_put; + return PTR_ERR(phy); } gtr_phy->phy = phy; @@ -1003,16 +979,9 @@ static int xpsgtr_probe(struct platform_device *pdev) provider = devm_of_phy_provider_register(&pdev->dev, xpsgtr_xlate); if (IS_ERR(provider)) { dev_err(&pdev->dev, "registering provider failed\n"); - ret = PTR_ERR(provider); - goto err_clk_put; + return PTR_ERR(provider); } return 0; - -err_clk_put: - for (i = 0; i < ARRAY_SIZE(gtr_dev->clk); i++) - clk_disable_unprepare(gtr_dev->clk[i]); - - return ret; } static const struct of_device_id xpsgtr_of_match[] = {