| Message ID | 20220919-v3-3-a803f2660127@baylibre.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add MT8195 HDMI support | expand |
Il 04/11/22 15:09, Guillaume Ranquet ha scritto: > To prepare support for newer chips that need to share their address > range with a dedicated ddc driver, use a regmap. > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > --- > drivers/gpu/drm/mediatek/mtk_hdmi.c | 43 +++++++++++-------------------------- > 1 file changed, 13 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c > index 4c80b6896dc3..9b02b30a193a 100644 > --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c > @@ -171,7 +171,7 @@ struct mtk_hdmi { > u32 ibias_up; > struct regmap *sys_regmap; > unsigned int sys_offset; > - void __iomem *regs; > + struct regmap *regs; > enum hdmi_colorspace csp; > struct hdmi_audio_param aud_param; > bool audio_enable; > @@ -187,44 +187,29 @@ static inline struct mtk_hdmi *hdmi_ctx_from_bridge(struct drm_bridge *b) > return container_of(b, struct mtk_hdmi, bridge); > } > > -static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) > +static int mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset, u32 *val) > { > - return readl(hdmi->regs + offset); > + return regmap_read(hdmi->regs, offset, val); > } > > static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val) > { > - writel(val, hdmi->regs + offset); > + regmap_write(hdmi->regs, offset, val); > } > > static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) You don't need these functions anymore, as these are now simply wrapping regmap calls, hence these don't contain any "real" logic anymore. Please remove them and use the regmap API directly. Thanks, Angelo
On Mon, 07 Nov 2022 12:20, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: >Il 04/11/22 15:09, Guillaume Ranquet ha scritto: >> To prepare support for newer chips that need to share their address >> range with a dedicated ddc driver, use a regmap. >> >> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> >> --- >> drivers/gpu/drm/mediatek/mtk_hdmi.c | 43 +++++++++++-------------------------- >> 1 file changed, 13 insertions(+), 30 deletions(-) >> >> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c >> index 4c80b6896dc3..9b02b30a193a 100644 >> --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c >> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c >> @@ -171,7 +171,7 @@ struct mtk_hdmi { >> u32 ibias_up; >> struct regmap *sys_regmap; >> unsigned int sys_offset; >> - void __iomem *regs; >> + struct regmap *regs; >> enum hdmi_colorspace csp; >> struct hdmi_audio_param aud_param; >> bool audio_enable; >> @@ -187,44 +187,29 @@ static inline struct mtk_hdmi *hdmi_ctx_from_bridge(struct drm_bridge *b) >> return container_of(b, struct mtk_hdmi, bridge); >> } >> >> -static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) >> +static int mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset, u32 *val) >> { >> - return readl(hdmi->regs + offset); >> + return regmap_read(hdmi->regs, offset, val); >> } >> >> static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val) >> { >> - writel(val, hdmi->regs + offset); >> + regmap_write(hdmi->regs, offset, val); >> } >> >> static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) > >You don't need these functions anymore, as these are now simply wrapping >regmap calls, hence these don't contain any "real" logic anymore. > >Please remove them and use the regmap API directly. > >Thanks, >Angelo > Agree with that, my intent was to minimize the change size so that it would be easy to review. My mistake, I'll remove the wrappers. Thx, Guillaume.
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c index 4c80b6896dc3..9b02b30a193a 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c @@ -171,7 +171,7 @@ struct mtk_hdmi { u32 ibias_up; struct regmap *sys_regmap; unsigned int sys_offset; - void __iomem *regs; + struct regmap *regs; enum hdmi_colorspace csp; struct hdmi_audio_param aud_param; bool audio_enable; @@ -187,44 +187,29 @@ static inline struct mtk_hdmi *hdmi_ctx_from_bridge(struct drm_bridge *b) return container_of(b, struct mtk_hdmi, bridge); } -static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) +static int mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset, u32 *val) { - return readl(hdmi->regs + offset); + return regmap_read(hdmi->regs, offset, val); } static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val) { - writel(val, hdmi->regs + offset); + regmap_write(hdmi->regs, offset, val); } static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) { - void __iomem *reg = hdmi->regs + offset; - u32 tmp; - - tmp = readl(reg); - tmp &= ~bits; - writel(tmp, reg); + regmap_clear_bits(hdmi->regs, offset, bits); } static void mtk_hdmi_set_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) { - void __iomem *reg = hdmi->regs + offset; - u32 tmp; - - tmp = readl(reg); - tmp |= bits; - writel(tmp, reg); + regmap_set_bits(hdmi->regs, offset, bits); } static void mtk_hdmi_mask(struct mtk_hdmi *hdmi, u32 offset, u32 val, u32 mask) { - void __iomem *reg = hdmi->regs + offset; - u32 tmp; - - tmp = readl(reg); - tmp = (tmp & ~mask) | (val & mask); - writel(tmp, reg); + regmap_update_bits(hdmi->regs, offset, mask, val); } static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black) @@ -473,7 +458,7 @@ static void mtk_hdmi_hw_aud_set_i2s_fmt(struct mtk_hdmi *hdmi, { u32 val; - val = mtk_hdmi_read(hdmi, GRL_CFG0); + mtk_hdmi_read(hdmi, GRL_CFG0, &val); val &= ~(CFG0_W_LENGTH_MASK | CFG0_I2S_MODE_MASK); switch (i2s_fmt) { @@ -565,7 +550,7 @@ static void mtk_hdmi_hw_aud_set_input_type(struct mtk_hdmi *hdmi, { u32 val; - val = mtk_hdmi_read(hdmi, GRL_CFG1); + mtk_hdmi_read(hdmi, GRL_CFG1, &val); if (input_type == HDMI_AUD_INPUT_I2S && (val & CFG1_SPDIF) == CFG1_SPDIF) { val &= ~CFG1_SPDIF; @@ -596,7 +581,7 @@ static void mtk_hdmi_hw_aud_src_reenable(struct mtk_hdmi *hdmi) { u32 val; - val = mtk_hdmi_read(hdmi, GRL_MIX_CTRL); + mtk_hdmi_read(hdmi, GRL_MIX_CTRL, &val); if (val & MIX_CTRL_SRC_EN) { val &= ~MIX_CTRL_SRC_EN; mtk_hdmi_write(hdmi, GRL_MIX_CTRL, val); @@ -610,7 +595,7 @@ static void mtk_hdmi_hw_aud_src_disable(struct mtk_hdmi *hdmi) { u32 val; - val = mtk_hdmi_read(hdmi, GRL_MIX_CTRL); + mtk_hdmi_read(hdmi, GRL_MIX_CTRL, &val); val &= ~MIX_CTRL_SRC_EN; mtk_hdmi_write(hdmi, GRL_MIX_CTRL, val); mtk_hdmi_write(hdmi, GRL_SHIFT_L1, 0x00); @@ -621,7 +606,7 @@ static void mtk_hdmi_hw_aud_set_mclk(struct mtk_hdmi *hdmi, { u32 val; - val = mtk_hdmi_read(hdmi, GRL_CFG5); + mtk_hdmi_read(hdmi, GRL_CFG5, &val); val &= CFG5_CD_RATIO_MASK; switch (mclk) { @@ -1427,7 +1412,6 @@ static int mtk_hdmi_dt_parse_pdata(struct mtk_hdmi *hdmi, struct device_node *cec_np, *remote, *i2c_np; struct platform_device *cec_pdev; struct regmap *regmap; - struct resource *mem; int ret; ret = mtk_hdmi_get_all_clk(hdmi, np); @@ -1473,8 +1457,7 @@ static int mtk_hdmi_dt_parse_pdata(struct mtk_hdmi *hdmi, } hdmi->sys_regmap = regmap; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hdmi->regs = devm_ioremap_resource(dev, mem); + hdmi->regs = device_node_to_regmap(dev->of_node); if (IS_ERR(hdmi->regs)) { ret = PTR_ERR(hdmi->regs); goto put_device;
To prepare support for newer chips that need to share their address range with a dedicated ddc driver, use a regmap. Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> --- drivers/gpu/drm/mediatek/mtk_hdmi.c | 43 +++++++++++-------------------------- 1 file changed, 13 insertions(+), 30 deletions(-)