@@ -488,5 +488,18 @@ voutcrg: clock-controller@295C0000 {
#reset-cells = <1>;
power-domains = <&pwrc JH7110_PD_VOUT>;
};
+
+ csi_phy: dphy@19820000 {
+ compatible = "starfive,jh7110-dphy-rx";
+ reg = <0x0 0x19820000 0x0 0x10000>;
+ clocks = <&ispcrg JH7110_ISPCLK_M31DPHY_CFGCLK_IN>,
+ <&ispcrg JH7110_ISPCLK_M31DPHY_REFCLK_IN>,
+ <&ispcrg JH7110_ISPCLK_M31DPHY_TXCLKESC_LAN0>;
+ clock-names = "cfg", "ref", "tx";
+ resets = <&ispcrg JH7110_ISPRST_M31DPHY_HW>,
+ <&ispcrg JH7110_ISPRST_M31DPHY_B09_ALWAYS_ON>;
+ starfive,aon-syscon = <&aon_syscon 0x00>;
+ #phy-cells = <0>;
+ };
};
};
Add dphy rx node for the Starfive JH7110 SoC. It use to transfer the CSI cameras data. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)