| Message ID | 20230331151250.4049-2-dmitry.baryshkov@linaro.org |
|---|---|
| State | Accepted |
| Commit | 813a2398907c2f8b94afc5d5f80e0f581b585a45 |
| Headers | show |
| Series | [RESEND,v2,1/2] phy: qcom-qmp-pcie: sc8180x PCIe PHY has 2 lanes | expand |
On 31.03.2023 17:12, Dmitry Baryshkov wrote: > The SDM845 QHP PHY doesn't have designated RX region. Corresponding RX > table is empty, so we can drop it completely. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > index f378c1ebefd7..df505279edfd 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > @@ -725,9 +725,6 @@ static const struct qmp_phy_init_tbl sdm845_qhp_pcie_tx_tbl[] = { > QMP_PHY_INIT_CFG(PCIE_GEN3_QHP_L0_RSM_START, 0x01), > }; > > -static const struct qmp_phy_init_tbl sdm845_qhp_pcie_rx_tbl[] = { > -}; > - > static const struct qmp_phy_init_tbl sdm845_qhp_pcie_pcs_tbl[] = { > QMP_PHY_INIT_CFG(PCIE_GEN3_QHP_PHY_POWER_STATE_CONFIG, 0x3f), > QMP_PHY_INIT_CFG(PCIE_GEN3_QHP_PHY_PCS_TX_RX_CONFIG, 0x50), > @@ -2212,8 +2209,6 @@ static const struct qmp_phy_cfg sdm845_qhp_pciephy_cfg = { > .serdes_num = ARRAY_SIZE(sdm845_qhp_pcie_serdes_tbl), > .tx = sdm845_qhp_pcie_tx_tbl, > .tx_num = ARRAY_SIZE(sdm845_qhp_pcie_tx_tbl), > - .rx = sdm845_qhp_pcie_rx_tbl, > - .rx_num = ARRAY_SIZE(sdm845_qhp_pcie_rx_tbl), > .pcs = sdm845_qhp_pcie_pcs_tbl, > .pcs_num = ARRAY_SIZE(sdm845_qhp_pcie_pcs_tbl), > },
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index f378c1ebefd7..df505279edfd 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -725,9 +725,6 @@ static const struct qmp_phy_init_tbl sdm845_qhp_pcie_tx_tbl[] = { QMP_PHY_INIT_CFG(PCIE_GEN3_QHP_L0_RSM_START, 0x01), }; -static const struct qmp_phy_init_tbl sdm845_qhp_pcie_rx_tbl[] = { -}; - static const struct qmp_phy_init_tbl sdm845_qhp_pcie_pcs_tbl[] = { QMP_PHY_INIT_CFG(PCIE_GEN3_QHP_PHY_POWER_STATE_CONFIG, 0x3f), QMP_PHY_INIT_CFG(PCIE_GEN3_QHP_PHY_PCS_TX_RX_CONFIG, 0x50), @@ -2212,8 +2209,6 @@ static const struct qmp_phy_cfg sdm845_qhp_pciephy_cfg = { .serdes_num = ARRAY_SIZE(sdm845_qhp_pcie_serdes_tbl), .tx = sdm845_qhp_pcie_tx_tbl, .tx_num = ARRAY_SIZE(sdm845_qhp_pcie_tx_tbl), - .rx = sdm845_qhp_pcie_rx_tbl, - .rx_num = ARRAY_SIZE(sdm845_qhp_pcie_rx_tbl), .pcs = sdm845_qhp_pcie_pcs_tbl, .pcs_num = ARRAY_SIZE(sdm845_qhp_pcie_pcs_tbl), },
The SDM845 QHP PHY doesn't have designated RX region. Corresponding RX table is empty, so we can drop it completely. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 5 ----- 1 file changed, 5 deletions(-)