| Message ID | 20230523140622.265692-6-dmitry.baryshkov@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | phy: qcom-qmp-ufs: convert to newer style of bindings | expand |
On 23.05.2023 16:06, Dmitry Baryshkov wrote: > Change the UFS QMP PHY to use newer style of QMP PHY bindings (single > resource region, no per-PHY subnodes). > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++-------------- > 1 file changed, 5 insertions(+), 14 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 90424442bb4a..68660d532afa 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2565,7 +2565,7 @@ ufs_mem_hc: ufshc@1d84000 { > <0 0x01d90000 0 0x8000>; > reg-names = "std", "ice"; > interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; > - phys = <&ufs_mem_phy_lanes>; > + phys = <&ufs_mem_phy>; > phy-names = "ufsphy"; > lanes-per-direction = <2>; > power-domains = <&gcc UFS_PHY_GDSC>; > @@ -2611,10 +2611,8 @@ ufs_mem_hc: ufshc@1d84000 { > > ufs_mem_phy: phy@1d87000 { > compatible = "qcom,sdm845-qmp-ufs-phy"; > - reg = <0 0x01d87000 0 0x18c>; > - #address-cells = <2>; > - #size-cells = <2>; > - ranges; > + reg = <0 0x01d87000 0 0x1000>; > + > clock-names = "ref", > "ref_aux"; > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, > @@ -2622,16 +2620,9 @@ ufs_mem_phy: phy@1d87000 { > > resets = <&ufs_mem_hc 0>; > reset-names = "ufsphy"; > - status = "disabled"; > > - ufs_mem_phy_lanes: phy@1d87400 { > - reg = <0 0x01d87400 0 0x108>, > - <0 0x01d87600 0 0x1e0>, > - <0 0x01d87c00 0 0x1dc>, > - <0 0x01d87800 0 0x108>, > - <0 0x01d87a00 0 0x1e0>; > - #phy-cells = <0>; > - }; > + #phy-cells = <0>; > + status = "disabled"; > }; > > cryptobam: dma-controller@1dc4000 {
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 90424442bb4a..68660d532afa 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2565,7 +2565,7 @@ ufs_mem_hc: ufshc@1d84000 { <0 0x01d90000 0 0x8000>; reg-names = "std", "ice"; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - phys = <&ufs_mem_phy_lanes>; + phys = <&ufs_mem_phy>; phy-names = "ufsphy"; lanes-per-direction = <2>; power-domains = <&gcc UFS_PHY_GDSC>; @@ -2611,10 +2611,8 @@ ufs_mem_hc: ufshc@1d84000 { ufs_mem_phy: phy@1d87000 { compatible = "qcom,sdm845-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x18c>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + reg = <0 0x01d87000 0 0x1000>; + clock-names = "ref", "ref_aux"; clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, @@ -2622,16 +2620,9 @@ ufs_mem_phy: phy@1d87000 { resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; - status = "disabled"; - ufs_mem_phy_lanes: phy@1d87400 { - reg = <0 0x01d87400 0 0x108>, - <0 0x01d87600 0 0x1e0>, - <0 0x01d87c00 0 0x1dc>, - <0 0x01d87800 0 0x108>, - <0 0x01d87a00 0 0x1e0>; - #phy-cells = <0>; - }; + #phy-cells = <0>; + status = "disabled"; }; cryptobam: dma-controller@1dc4000 {
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-)