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Signed-off-by: Swapnil Jakhade Reviewed-by: Roger Quadros --- drivers/phy/cadence/phy-cadence-torrent.c | 233 +++++++++++++++++++++- 1 file changed, 228 insertions(+), 5 deletions(-) diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 3b0e4daa9de9..d4be3f098040 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -27,13 +27,14 @@ #define REF_CLK_19_2MHZ 19200000 #define REF_CLK_25MHZ 25000000 #define REF_CLK_100MHZ 100000000 +#define REF_CLK_156_25MHZ 156250000 #define MAX_NUM_LANES 4 #define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps */ #define NUM_SSC_MODE 3 -#define NUM_REF_CLK 3 -#define NUM_PHY_TYPE 6 +#define NUM_REF_CLK 4 +#define NUM_PHY_TYPE 7 #define POLL_TIMEOUT_US 5000 #define PLL_LOCK_TIMEOUT 100000 @@ -106,6 +107,7 @@ #define CMN_PLL0_HIGH_THR_M0 0x0093U #define CMN_PLL0_DSM_DIAG_M0 0x0094U #define CMN_PLL0_DSM_FBH_OVRD_M0 0x0095U +#define CMN_PLL0_DSM_FBL_OVRD_M0 0x0096U #define CMN_PLL0_SS_CTRL1_M0 0x0098U #define CMN_PLL0_SS_CTRL2_M0 0x0099U #define CMN_PLL0_SS_CTRL3_M0 0x009AU @@ -196,6 +198,10 @@ #define RX_PSC_A2 0x0002U #define RX_PSC_A3 0x0003U #define RX_PSC_CAL 0x0006U +#define RX_SDCAL0_INIT_TMR 0x0044U +#define RX_SDCAL0_ITER_TMR 0x0045U +#define RX_SDCAL1_INIT_TMR 0x004CU +#define RX_SDCAL1_ITER_TMR 0x004DU #define RX_CDRLF_CNFG 0x0080U #define RX_CDRLF_CNFG3 0x0082U #define RX_SIGDET_HL_FILT_TMR 0x0090U @@ -294,12 +300,14 @@ enum cdns_torrent_phy_type { TYPE_SGMII, TYPE_QSGMII, TYPE_USB, + TYPE_USXGMII, }; enum cdns_torrent_ref_clk { CLK_19_2_MHZ, CLK_25_MHZ, - CLK_100_MHZ + CLK_100_MHZ, + CLK_156_25_MHZ }; enum cdns_torrent_ssc_mode { @@ -403,6 +411,8 @@ struct cdns_torrent_data { [NUM_SSC_MODE]; struct cdns_torrent_vals *pcs_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE] [NUM_SSC_MODE]; + struct cdns_torrent_vals *phy_pma_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE] + [NUM_SSC_MODE]; struct cdns_torrent_vals *cmn_vals[NUM_REF_CLK][NUM_PHY_TYPE] [NUM_PHY_TYPE][NUM_SSC_MODE]; struct cdns_torrent_vals *tx_ln_vals[NUM_REF_CLK][NUM_PHY_TYPE] @@ -644,6 +654,8 @@ static const char *cdns_torrent_get_phy_type(enum cdns_torrent_phy_type phy_type return "QSGMII"; case TYPE_USB: return "USB"; + case TYPE_USXGMII: + return "USXGMII"; default: return "None"; } @@ -2243,6 +2255,7 @@ static int cdns_torrent_phy_init(struct phy *phy) struct cdns_torrent_inst *inst = phy_get_drvdata(phy); enum cdns_torrent_phy_type phy_type = inst->phy_type; enum cdns_torrent_ssc_mode ssc = inst->ssc_mode; + struct cdns_torrent_vals *phy_pma_cmn_vals; struct cdns_torrent_vals *pcs_cmn_vals; struct cdns_reg_pairs *reg_pairs; struct regmap *regmap; @@ -2257,9 +2270,9 @@ static int cdns_torrent_phy_init(struct phy *phy) /** * Spread spectrum generation is not required or supported - * for SGMII/QSGMII + * for SGMII/QSGMII/USXGMII */ - if (phy_type == TYPE_SGMII || phy_type == TYPE_QSGMII) + if (phy_type == TYPE_SGMII || phy_type == TYPE_QSGMII || phy_type == TYPE_USXGMII) ssc = NO_SSC; /* PHY configuration specific registers for single link */ @@ -2303,6 +2316,17 @@ static int cdns_torrent_phy_init(struct phy *phy) reg_pairs[i].val); } + /* PHY PMA common registers configurations */ + phy_pma_cmn_vals = init_data->phy_pma_cmn_vals[phy_type][TYPE_NONE][ssc]; + if (phy_pma_cmn_vals) { + reg_pairs = phy_pma_cmn_vals->reg_pairs; + num_regs = phy_pma_cmn_vals->num_regs; + regmap = cdns_phy->regmap_phy_pma_common_cdb; + for (i = 0; i < num_regs; i++) + regmap_write(regmap, reg_pairs[i].off, + reg_pairs[i].val); + } + /* PMA common registers configurations */ cmn_vals = init_data->cmn_vals[ref_clk][phy_type][TYPE_NONE][ssc]; if (cmn_vals) { @@ -2616,6 +2640,9 @@ static int cdns_torrent_clk(struct cdns_torrent_phy *cdns_phy) case REF_CLK_100MHZ: cdns_phy->ref_clk_rate = CLK_100_MHZ; break; + case REF_CLK_156_25MHZ: + cdns_phy->ref_clk_rate = CLK_156_25_MHZ; + break; default: dev_err(cdns_phy->dev, "Invalid Ref Clock Rate\n"); clk_disable_unprepare(cdns_phy->clk); @@ -2735,6 +2762,9 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) case PHY_TYPE_USB3: cdns_phy->phys[node].phy_type = TYPE_USB; break; + case PHY_TYPE_USXGMII: + cdns_phy->phys[node].phy_type = TYPE_USXGMII; + break; default: dev_err(dev, "Unsupported protocol\n"); ret = -EINVAL; @@ -2928,6 +2958,123 @@ static struct cdns_torrent_vals dp_usb_xcvr_diag_ln_vals = { .num_regs = ARRAY_SIZE(dp_usb_xcvr_diag_ln_regs), }; +/* TI USXGMII configuration: Enable cmn_refclk_rcv_out_en */ +static struct cdns_reg_pairs ti_usxgmii_phy_pma_cmn_regs[] = { + {0x0040, PHY_PMA_CMN_CTRL1}, +}; + +static struct cdns_torrent_vals ti_usxgmii_phy_pma_cmn_vals = { + .reg_pairs = ti_usxgmii_phy_pma_cmn_regs, + .num_regs = ARRAY_SIZE(ti_usxgmii_phy_pma_cmn_regs), +}; + +/* Single USXGMII link configuration */ +static struct cdns_reg_pairs sl_usxgmii_link_cmn_regs[] = { + {0x0000, PHY_PLL_CFG}, + {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M0} +}; + +static struct cdns_reg_pairs sl_usxgmii_xcvr_diag_ln_regs[] = { + {0x0000, XCVR_DIAG_HSCLK_SEL}, + {0x0001, XCVR_DIAG_HSCLK_DIV}, + {0x0001, XCVR_DIAG_PLLDRC_CTRL} +}; + +static struct cdns_torrent_vals sl_usxgmii_link_cmn_vals = { + .reg_pairs = sl_usxgmii_link_cmn_regs, + .num_regs = ARRAY_SIZE(sl_usxgmii_link_cmn_regs), +}; + +static struct cdns_torrent_vals sl_usxgmii_xcvr_diag_ln_vals = { + .reg_pairs = sl_usxgmii_xcvr_diag_ln_regs, + .num_regs = ARRAY_SIZE(sl_usxgmii_xcvr_diag_ln_regs), +}; + +/* Single link USXGMII, 156.25 MHz Ref clk, no SSC */ +static struct cdns_reg_pairs sl_usxgmii_156_25_no_ssc_cmn_regs[] = { + {0x0014, CMN_SSM_BIAS_TMR}, + {0x0028, CMN_PLLSM0_PLLPRE_TMR}, + {0x00A4, CMN_PLLSM0_PLLLOCK_TMR}, + {0x0028, CMN_PLLSM1_PLLPRE_TMR}, + {0x00A4, CMN_PLLSM1_PLLLOCK_TMR}, + {0x0062, CMN_BGCAL_INIT_TMR}, + {0x0062, CMN_BGCAL_ITER_TMR}, + {0x0014, CMN_IBCAL_INIT_TMR}, + {0x0018, CMN_TXPUCAL_INIT_TMR}, + {0x0005, CMN_TXPUCAL_ITER_TMR}, + {0x0018, CMN_TXPDCAL_INIT_TMR}, + {0x0005, CMN_TXPDCAL_ITER_TMR}, + {0x024A, CMN_RXCAL_INIT_TMR}, + {0x0005, CMN_RXCAL_ITER_TMR}, + {0x000B, CMN_SD_CAL_REFTIM_START}, + {0x0132, CMN_SD_CAL_PLLCNT_START}, + {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0}, + {0x0014, CMN_PLL0_DSM_FBH_OVRD_M0}, + {0x0014, CMN_PLL1_DSM_FBH_OVRD_M0}, + {0x0005, CMN_PLL0_DSM_FBL_OVRD_M0}, + {0x0005, CMN_PLL1_DSM_FBL_OVRD_M0}, + {0x061B, CMN_PLL0_VCOCAL_INIT_TMR}, + {0x061B, CMN_PLL1_VCOCAL_INIT_TMR}, + {0x0019, CMN_PLL0_VCOCAL_ITER_TMR}, + {0x0019, CMN_PLL1_VCOCAL_ITER_TMR}, + {0x1354, CMN_PLL0_VCOCAL_REFTIM_START}, + {0x1354, CMN_PLL1_VCOCAL_REFTIM_START}, + {0x1354, CMN_PLL0_VCOCAL_PLLCNT_START}, + {0x1354, CMN_PLL1_VCOCAL_PLLCNT_START}, + {0x0003, CMN_PLL0_VCOCAL_TCTRL}, + {0x0003, CMN_PLL1_VCOCAL_TCTRL}, + {0x0138, CMN_PLL0_LOCK_REFCNT_START}, + {0x0138, CMN_PLL1_LOCK_REFCNT_START}, + {0x0138, CMN_PLL0_LOCK_PLLCNT_START}, + {0x0138, CMN_PLL1_LOCK_PLLCNT_START} +}; + +static struct cdns_reg_pairs usxgmii_156_25_no_ssc_tx_ln_regs[] = { + {0x07A2, TX_RCVDET_ST_TMR}, + {0x00F3, TX_PSC_A0}, + {0x04A2, TX_PSC_A2}, + {0x04A2, TX_PSC_A3}, + {0x0000, TX_TXCC_CPOST_MULT_00}, + {0x0000, XCVR_DIAG_PSC_OVRD} +}; + +static struct cdns_reg_pairs usxgmii_156_25_no_ssc_rx_ln_regs[] = { + {0x0014, RX_SDCAL0_INIT_TMR}, + {0x0062, RX_SDCAL0_ITER_TMR}, + {0x0014, RX_SDCAL1_INIT_TMR}, + {0x0062, RX_SDCAL1_ITER_TMR}, + {0x091D, RX_PSC_A0}, + {0x0900, RX_PSC_A2}, + {0x0100, RX_PSC_A3}, + {0x0030, RX_REE_SMGM_CTRL1}, + {0x03C7, RX_REE_GCSM1_EQENM_PH1}, + {0x01C7, RX_REE_GCSM1_EQENM_PH2}, + {0x0000, RX_DIAG_DFE_CTRL}, + {0x0019, RX_REE_TAP1_CLIP}, + {0x0019, RX_REE_TAP2TON_CLIP}, + {0x00B9, RX_DIAG_NQST_CTRL}, + {0x0C21, RX_DIAG_DFE_AMP_TUNE_2}, + {0x0002, RX_DIAG_DFE_AMP_TUNE_3}, + {0x0033, RX_DIAG_PI_RATE}, + {0x0001, RX_DIAG_ACYA}, + {0x018C, RX_CDRLF_CNFG} +}; + +static struct cdns_torrent_vals sl_usxgmii_156_25_no_ssc_cmn_vals = { + .reg_pairs = sl_usxgmii_156_25_no_ssc_cmn_regs, + .num_regs = ARRAY_SIZE(sl_usxgmii_156_25_no_ssc_cmn_regs), +}; + +static struct cdns_torrent_vals usxgmii_156_25_no_ssc_tx_ln_vals = { + .reg_pairs = usxgmii_156_25_no_ssc_tx_ln_regs, + .num_regs = ARRAY_SIZE(usxgmii_156_25_no_ssc_tx_ln_regs), +}; + +static struct cdns_torrent_vals usxgmii_156_25_no_ssc_rx_ln_vals = { + .reg_pairs = usxgmii_156_25_no_ssc_rx_ln_regs, + .num_regs = ARRAY_SIZE(usxgmii_156_25_no_ssc_rx_ln_regs), +}; + /* PCIe and DP link configuration */ static struct cdns_reg_pairs pcie_dp_link_cmn_regs[] = { {0x0003, PHY_PLL_CFG}, @@ -4028,6 +4175,11 @@ static const struct cdns_torrent_data cdns_map_torrent = { [NO_SSC] = &usb_dp_link_cmn_vals, }, }, + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &sl_usxgmii_link_cmn_vals, + }, + }, }, .xcvr_diag_vals = { [TYPE_DP] = { @@ -4121,6 +4273,11 @@ static const struct cdns_torrent_data cdns_map_torrent = { [NO_SSC] = &usb_dp_xcvr_diag_ln_vals, }, }, + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &sl_usxgmii_xcvr_diag_ln_vals, + }, + }, }, .pcs_cmn_vals = { [TYPE_USB] = { @@ -4149,6 +4306,13 @@ static const struct cdns_torrent_data cdns_map_torrent = { }, }, }, + .phy_pma_cmn_vals = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = NULL, + }, + }, + }, .cmn_vals = { [CLK_19_2_MHZ] = { [TYPE_DP] = { @@ -4257,6 +4421,13 @@ static const struct cdns_torrent_data cdns_map_torrent = { }, }, }, + [CLK_156_25_MHZ] = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &sl_usxgmii_156_25_no_ssc_cmn_vals, + }, + }, + }, }, .tx_ln_vals = { [CLK_19_2_MHZ] = { @@ -4366,6 +4537,13 @@ static const struct cdns_torrent_data cdns_map_torrent = { }, }, }, + [CLK_156_25_MHZ] = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &usxgmii_156_25_no_ssc_tx_ln_vals, + }, + }, + }, }, .rx_ln_vals = { [CLK_19_2_MHZ] = { @@ -4475,6 +4653,13 @@ static const struct cdns_torrent_data cdns_map_torrent = { }, }, }, + [CLK_156_25_MHZ] = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &usxgmii_156_25_no_ssc_rx_ln_vals, + }, + }, + }, }, }; @@ -4573,6 +4758,11 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = { [NO_SSC] = &usb_dp_link_cmn_vals, }, }, + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &sl_usxgmii_link_cmn_vals, + }, + }, }, .xcvr_diag_vals = { [TYPE_DP] = { @@ -4666,6 +4856,11 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = { [NO_SSC] = &usb_dp_xcvr_diag_ln_vals, }, }, + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &sl_usxgmii_xcvr_diag_ln_vals, + }, + }, }, .pcs_cmn_vals = { [TYPE_USB] = { @@ -4694,6 +4889,13 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = { }, }, }, + .phy_pma_cmn_vals = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &ti_usxgmii_phy_pma_cmn_vals, + }, + }, + }, .cmn_vals = { [CLK_19_2_MHZ] = { [TYPE_DP] = { @@ -4802,6 +5004,13 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = { }, }, }, + [CLK_156_25_MHZ] = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &sl_usxgmii_156_25_no_ssc_cmn_vals, + }, + }, + }, }, .tx_ln_vals = { [CLK_19_2_MHZ] = { @@ -4911,6 +5120,13 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = { }, }, }, + [CLK_156_25_MHZ] = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &usxgmii_156_25_no_ssc_tx_ln_vals, + }, + }, + }, }, .rx_ln_vals = { [CLK_19_2_MHZ] = { @@ -5020,6 +5236,13 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = { }, }, }, + [CLK_156_25_MHZ] = { + [TYPE_USXGMII] = { + [TYPE_NONE] = { + [NO_SSC] = &usxgmii_156_25_no_ssc_rx_ln_vals, + }, + }, + }, }, };