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Tue, 7 Nov 2023 12:26:31 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 7 Nov 2023 04:26:26 -0800 From: Krishna chaitanya chundru Date: Tue, 7 Nov 2023 17:56:13 +0530 Subject: [PATCH v2 1/3] dt-bindings: phy: qcom,qmp: Add PCIe qcom,refclk-always-on property MIME-Version: 1.0 Message-ID: <20231107-refclk_always_on-v2-1-de23962fc4b3@quicinc.com> References: <20231107-refclk_always_on-v2-0-de23962fc4b3@quicinc.com> In-Reply-To: <20231107-refclk_always_on-v2-0-de23962fc4b3@quicinc.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , , , , , , , "Krishna chaitanya chundru" X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1699359980; l=1150; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; 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Signed-off-by: Krishna chaitanya chundru --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 2c3d6553a7ba..263291447a5b 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -93,6 +93,13 @@ properties: "#phy-cells": const: 0 + qcom,refclk-always-on: + type: boolean + description: If there is some issues in platform with clkreq signal + propagation to the host and due to that host will not send refclk, which + results in linkdown in L1.2 or L1.1 exit initiated by EP. This property + if set keeps refclk always on even in Low power states (optional). + required: - compatible - reg