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Sat, 10 Feb 2024 12:46:18 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCXp+RFU8mZpxCtEceZNXbFefupSCxccqNul+K627frYKB5kqD9Ci0D+HmS0VoTCA2l9hr/+GH5IEcWuxD25v6REUdfZUD25aWmh0501FUYZ7hhykFZQ8Nfsm5j1pZUQKgB7V4mw3i35kMli+wNH+wyOQnWXtWEt/Z+AYOEYxqEWiQaN/mj7t6rN+75gPm0o8CzSQqROVyLdY8w1wOr3ecmy/x318kl18r3p9zq01TEPkR5dpSrpwv1wrX/YuQ3b+IPqcofgjgj37lnx/fwywbQbOq5OR+Gw7piXYfii+ITjOplrII9MaXDC8CZ9X///b0LUK498XQ56zkKvBjwQNX8+DSvqqr/emzhFJWPrW2tRlMlZxhm4TcZT0hj4D5OlLVtxqMKqAV0ycOGLfE5XEoMpvgmYt9nluCcbp3kASNAM/CmZuBN6S5C8MpXrPU/6bTBHKqabD0xJhWrR3kED5docHGr6g5huCauJ9Txg3bI5znAdAJSPOKlpLpFg18cAdi9bcWKV6LjCVBoqcTxSTB9+aTl/Pz8/iQd740Z8J6C2PmJWVfSaP4Sn+OiXTFzwLqnfaedqXz7AtEx3vwwF81rWTQw0+AcOoSBI4X+3o0fCD/LVCwUr9wV7K+9EmdE2P4SK4hSwGP/QJ/KVVMDzfnVd Received: from aford-System-Version.lan ([2601:447:d002:5be:27d7:3989:2897:88a7]) by smtp.gmail.com with ESMTPSA id m20-20020a0cdb94000000b0068c9db26ae1sm2079526qvk.41.2024.02.10.12.46.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Feb 2024 12:46:17 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Cc: marex@denx.de, aford@beaconembedded.com, Lucas Stach , Adam Ford , Krzysztof Kozlowski , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Catalin Marinas , Will Deacon , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V4 1/6] dt-bindings: phy: add binding for the i.MX8MP HDMI PHY Date: Sat, 10 Feb 2024 14:45:57 -0600 Message-ID: <20240210204606.11944-2-aford173@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240210204606.11944-1-aford173@gmail.com> References: <20240210204606.11944-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240210_124619_902866_E0A42FBD X-CRM114-Status: GOOD ( 15.61 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org From: Lucas Stach Add a DT binding for the HDMI PHY found on the i.MX8MP SoC. Signed-off-by: Lucas Stach Signed-off-by: Adam Ford Reviewed-by: Krzysztof Kozlowski Reviewed-by: Luca Ceresoli --- V4: No Change V3: Removed mintems at the request of Krzysztof and add his reviewed-by V2: I (Adam) tried to help move this along, so I took Lucas' patch and attempted to apply fixes based on feedback. I don't have all the history, so apologies for that. Added phy-cells to the required list and fixed an error due to the word 'binding' being in the title. --- .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml new file mode 100644 index 000000000000..c43e86a8c2e0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MP HDMI PHY + +maintainers: + - Lucas Stach + +properties: + compatible: + enum: + - fsl,imx8mp-hdmi-phy + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: apb + - const: ref + + "#phy-cells": + const: 0 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + - clocks + - clock-names + - "#phy-cells" + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + + phy@32fdff00 { + compatible = "fsl,imx8mp-hdmi-phy"; + reg = <0x32fdff00 0x100>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "ref"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; + #clock-cells = <0>; + #phy-cells = <0>; + };