| Message ID | 20240822152801.602318-16-claudiu.beznea.uj@bp.renesas.com |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add initial USB support for the Renesas RZ/G3S SoC | expand |
Hi Claudiu, On Thu, Aug 22, 2024 at 5:28 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Enable USB support (host, device, USB PHYs and sysc). > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi > @@ -144,3 +188,20 @@ &sdhi1 { > max-frequency = <125000000>; > status = "okay"; > }; > + > +&sysc { > + status = "okay"; > +}; > + To avoid regressions (/sys/devices/soc0/ disappearing), enabling sysc is a dependency for "[PATCH 05/16] soc: renesas: sysc: Move RZ/G3S SoC detection on SYSC driver", so I think it makes sense to change its status to "okay" in r9a08g045.dtsi instead, and spin that off into its own patch. I am not super-worried, so doing the driver and DTS changes in separate patches should be fine, as long as they meet each other in next or upstream. The rest LGTM. Gr{oetje,eeting}s, Geert
Hi, Geert, On 08.10.2024 18:16, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Thu, Aug 22, 2024 at 5:28 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >> Enable USB support (host, device, USB PHYs and sysc). >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Thanks for your patch! > >> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi >> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi >> @@ -144,3 +188,20 @@ &sdhi1 { >> max-frequency = <125000000>; >> status = "okay"; >> }; >> + >> +&sysc { >> + status = "okay"; >> +}; >> + > > To avoid regressions (/sys/devices/soc0/ disappearing), enabling sysc > is a dependency for "[PATCH 05/16] soc: renesas: sysc: Move RZ/G3S > SoC detection on SYSC driver", so I think it makes sense to change > its status to "okay" in r9a08g045.dtsi instead, and spin that off into > its own patch. Good point! I'll add the dtsi changes into "[PATCH 05/16] soc: renesas: sysc: Move RZ/G3S SoC detection on SYSC driver". Thank you, Claudiu Beznea I am not super-worried, so doing the driver and DTS > changes in separate patches should be fine, as long as they meet each > other in next or upstream. > > The rest LGTM. > > Gr{oetje,eeting}s, > > Geert >
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index deb2ad37bb2e..fd9355936803 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -66,6 +66,29 @@ vccq_sdhi1: regulator-vccq-sdhi1 { }; }; +&ehci0 { + dr_mode = "otg"; + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&hsusb { + dr_mode = "otg"; + status = "okay"; +}; + +&ohci0 { + dr_mode = "otg"; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + &pinctrl { key-1-gpio-hog { gpio-hog; @@ -124,6 +147,27 @@ cd { pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */ }; }; + + usb0_pins: usb0 { + peri { + pinmux = <RZG2L_PORT_PINMUX(5, 0, 1)>, /* VBUS */ + <RZG2L_PORT_PINMUX(5, 2, 1)>; /* OVC */ + }; + + otg { + pinmux = <RZG2L_PORT_PINMUX(5, 3, 1)>; /* OTG_ID */ + bias-pull-up; + }; + }; + + usb1_pins: usb1 { + pinmux = <RZG2L_PORT_PINMUX(5, 4, 5)>, /* OVC */ + <RZG2L_PORT_PINMUX(6, 0, 1)>; /* VBUS */ + }; +}; + +&phyrst { + status = "okay"; }; &scif0 { @@ -144,3 +188,20 @@ &sdhi1 { max-frequency = <125000000>; status = "okay"; }; + +&sysc { + status = "okay"; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + vbus-supply = <&usb0_vbus_otg>; + status = "okay"; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + status = "okay"; +};