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AJvYcCV4QgQe3++pFAQmwV089KbOKlTWPX2ob92DnBoD4/gZ6MDYqTbYgyibxy6uoOe8J0kCkFJrckFusqk=@lists.infradead.org X-Gm-Message-State: AOJu0YwcpTOqyURRP4Wvz/Ji4zf3ft99QR0fnJZIfu0Mip9rOoEf2Sor NMZepSpC9u7H7HHO/tBZZuRRnnYyJLss8dZ4TQx9wz2Fh0s6j8WOPB4O7gVdX58= X-Google-Smtp-Source: AGHT+IEQc2WmlGwouFQBkWQzt6fGr5tg/HyKqMkIdRZTfK8Hcv4Eq8Fi6eRvtniBCRuj83IQhPoGdQ== X-Received: by 2002:adf:f285:0:b0:368:37ac:3f95 with SMTP id ffacd0b85a97d-37cfb9d32d9mr2626016f8f.31.1727900175454; Wed, 02 Oct 2024 13:16:15 -0700 (PDT) Received: from gpeter-l.lan ([145.224.66.77]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37cd564d2e8sm14850600f8f.18.2024.10.02.13.16.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Oct 2024 13:16:15 -0700 (PDT) From: Peter Griffin To: vkoul@kernel.org, kishon@kernel.org, krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com Cc: tudor.ambarus@linaro.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Peter Griffin Subject: [PATCH 2/3] phy: samsung-ufs: add support for HIBERN8_ENTER and HIBERN8_EXIT Date: Wed, 2 Oct 2024 21:15:54 +0100 Message-ID: <20241002201555.3332138-3-peter.griffin@linaro.org> X-Mailer: git-send-email 2.46.1.824.gd892dcdcdd-goog In-Reply-To: <20241002201555.3332138-1-peter.griffin@linaro.org> References: <20241002201555.3332138-1-peter.griffin@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_131617_291826_05126E95 X-CRM114-Status: GOOD ( 14.49 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Add two new states CFG_POST_HIBERN8_ENTER and CFG_PRE_HIBERN8_EXIT to the phy driver which map to the new PHY_MODE_UFS_HIBERN8_ENTER and PHY_MODE_UFS_HIBERN8_EXIT modes. These are used to program phy specific calibration values when entering and exiting hibern8. When exiting from hibern8 state we also update the logic to wait for cdr lock. Signed-off-by: Peter Griffin --- drivers/phy/samsung/phy-samsung-ufs.c | 18 ++++++++++++++++-- drivers/phy/samsung/phy-samsung-ufs.h | 2 ++ 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c index 6c5d41552649..7162ae5c7bc8 100644 --- a/drivers/phy/samsung/phy-samsung-ufs.c +++ b/drivers/phy/samsung/phy-samsung-ufs.c @@ -87,6 +87,12 @@ static int samsung_ufs_phy_calibrate(struct phy *phy) return -EINVAL; } + if (ufs_phy->mode == PHY_MODE_UFS_HIBERN8_ENTER) + ufs_phy->ufs_phy_state = CFG_POST_HIBERN8_ENTER; + + if (ufs_phy->mode == PHY_MODE_UFS_HIBERN8_EXIT) + ufs_phy->ufs_phy_state = CFG_PRE_HIBERN8_EXIT; + cfg = cfgs[ufs_phy->ufs_phy_state]; if (!cfg) goto out; @@ -105,8 +111,9 @@ static int samsung_ufs_phy_calibrate(struct phy *phy) goto out; } - if (ufs_phy->ufs_phy_state == CFG_POST_PWR_HS && - ufs_phy->drvdata->wait_for_cdr) { + if ((ufs_phy->ufs_phy_state == CFG_POST_PWR_HS || + ufs_phy->ufs_phy_state == CFG_PRE_HIBERN8_EXIT) && + ufs_phy->drvdata->wait_for_cdr) { err = ufs_phy->drvdata->wait_for_cdr(phy, i); if (err) goto out; @@ -137,6 +144,13 @@ static int samsung_ufs_phy_calibrate(struct phy *phy) /* Change back to INIT state */ ufs_phy->ufs_phy_state = CFG_PRE_INIT; break; + case CFG_POST_HIBERN8_ENTER: + ufs_phy->ufs_phy_state = CFG_PRE_HIBERN8_EXIT; + break; + case CFG_PRE_HIBERN8_EXIT: + /* Change back to INIT state */ + ufs_phy->ufs_phy_state = CFG_PRE_INIT; + break; default: dev_err(ufs_phy->dev, "wrong state for phy calibration\n"); } diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h index 9b7deef6e10f..b42ed586aba8 100644 --- a/drivers/phy/samsung/phy-samsung-ufs.h +++ b/drivers/phy/samsung/phy-samsung-ufs.h @@ -89,6 +89,8 @@ enum { CFG_POST_INIT, CFG_PRE_PWR_HS, CFG_POST_PWR_HS, + CFG_POST_HIBERN8_ENTER, + CFG_PRE_HIBERN8_EXIT, CFG_TAG_MAX, };