From patchwork Mon Nov 4 11:11:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 13861244 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 85863D132AF for ; Mon, 4 Nov 2024 11:17:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OSkGmo15zG7ZA1G+mWP0KGXMm4n0R/N0zJTnsFVP4iE=; b=h6udl1ctAILRy9 yO7CFSoXdYkb87M6jzyNf2rAPYzt7er5Mu2krwPavzDAOJ6xVcsa8na4QetgAp29LRETrZAsKeBuW XLU8YSQqmUjk+mWC04/H5Y9X8Yv2rtVDsbRh5BnfoiQP+ATkf/n49km0rxg0p9BuMu/wZesAIWk21 0cIkpF3a4Yl38o3PPAVTOb5s2wqc/VFWUYeW0iMBGleRfNRzvniOycjuXcIgIaOaoybtagunw4bPk p+8bUZo5gx3+kuJxzRIO5LvNhi8n7FqInlWWJ+BZRNIJqNUA3NQuP7r7ohk0juol5sZFHJrsWX57p vqsrx+sr4yAO0bnSwmAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t7v5K-0000000DTRi-3KPZ; Mon, 04 Nov 2024 11:17:26 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t7v02-0000000DRvR-0SHr; Mon, 04 Nov 2024 11:11:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=w7/g9Zj2Xo2MH4IP+M9trsnCfhBTMntQIjnavN8DZS0=; b=1HJLf9jmM9s95Zeo2dMrYuLuxI mRnZoHCiIAEKOYTTDGFkLsuzT124zTSYLTfHsyuBJrZBHM3J3mkviGV1JRedlt/rR6YPqFsVN3xZI qe5SNkeP/3QHB+RQA9e2uyOVVLrLT+P84ENu0Q4r1IO8CnYgdIsIaufybY5cxd1kQHDha19dwq9tY LGFndaYSdoT7qkJVkLdkKP/gyGK4AqOkpGIht3Avh8H/IoGnklhG766XWpwAy7qfIrVEI2M+N/89X 3Zr1+hkeMuS2lj/ST8GWTydWHOrOyxyd+R5EtjX6GKZqyWB0okHXaAjS0jcvITcsJ7wQBsICICCf1 413YuubA==; Received: from i5e860cc9.versanet.de ([94.134.12.201] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1t7uzy-0008Vi-Qx; Mon, 04 Nov 2024 12:11:54 +0100 From: Heiko Stuebner To: vkoul@kernel.org, kishon@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, heiko@sntech.de, Heiko Stuebner Subject: [PATCH v2 1/2] dt-bindings: phy: Add Rockchip MIPI CSI/DSI PHY schema Date: Mon, 4 Nov 2024 12:11:15 +0100 Message-ID: <20241104111121.99274-2-heiko@sntech.de> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241104111121.99274-1-heiko@sntech.de> References: <20241104111121.99274-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241104_031158_197407_E47DC2EA X-CRM114-Status: GOOD ( 14.33 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org From: Heiko Stuebner Add dt-binding schema for the MIPI CSI/DSI PHY found on Rockchip RK3588 SoCs. Signed-off-by: Heiko Stuebner Reviewed-by: Krzysztof Kozlowski --- .../phy/rockchip,rk3588-mipi-dcphy.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml new file mode 100644 index 000000000000..5ee8d7246fa0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3588-mipi-dcphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip MIPI CSI/DSI PHY with Samsung IP block + +maintainers: + - Guochun Huang + - Heiko Stuebner + +properties: + compatible: + enum: + - rockchip,rk3576-mipi-dcphy + - rockchip,rk3588-mipi-dcphy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: ref + + resets: + maxItems: 4 + + reset-names: + items: + - const: m_phy + - const: apb + - const: grf + - const: s_phy + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the 'mipi dcphy general register files'. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + phy@feda0000 { + compatible = "rockchip,rk3588-mipi-dcphy"; + reg = <0x0 0xfeda0000 0x0 0x10000>; + clocks = <&cru PCLK_MIPI_DCPHY0>, + <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>; + clock-names = "pclk", "ref"; + resets = <&cru SRST_M_MIPI_DCPHY0>, + <&cru SRST_P_MIPI_DCPHY0>, + <&cru SRST_P_MIPI_DCPHY0_GRF>, + <&cru SRST_S_MIPI_DCPHY0>; + reset-names = "m_phy", "apb", "grf", "s_phy"; + rockchip,grf = <&mipidcphy0_grf>; + #phy-cells = <0>; + }; + };