| Message ID | 20241129-add-displayport-support-for-qcs615-platform-v1-2-09a4338d93ef@quicinc.com |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add DisplayPort support for QCS615 platform | expand |
On 29/11/2024 08:57, Xiangxu Yin wrote: > Declare the DP QMP PHY present on the Qualcomm QCS615 platforms. > > Signed-off-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> > --- > .../bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 21 +++++++++++++++++++-- > 1 file changed, 19 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml > index 1636285fbe535c430fdf792b33a5e9c523de323b..eb21cfe734526fce670c540212a607a016cedf2c 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml > @@ -18,6 +18,7 @@ properties: > enum: > - qcom,msm8998-qmp-usb3-phy > - qcom,qcm2290-qmp-usb3-phy > + - qcom,qcs615-qmp-dp-phy > - qcom,qcs615-qmp-usb3-phy > - qcom,sdm660-qmp-usb3-phy > - qcom,sm6115-qmp-usb3-phy > @@ -47,7 +48,7 @@ properties: > const: 0 > > clock-output-names: > - maxItems: 1 > + maxItems: 2 Why all devices now have two clocks? No, this needs lower constraints and further customization per each variant. > > "#phy-cells": > const: 0 > @@ -62,7 +63,8 @@ properties: > items: > - items: > - description: phandle to TCSR hardware block > - - description: offset of the VLS CLAMP register > + - description: offset of the VLS CLAMP register in USB mode > + and offset of the DP Phy mode register in DP mode You change all existing devices, no. > description: Clamp register present in the TCSR > > ports: > @@ -128,6 +130,21 @@ allOf: > - const: com_aux > - const: pipe > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,qcs615-qmp-dp-phy > + then: > + properties: > + clocks: > + maxItems: 2 > + clock-names: > + items: > + - const: cfg_ahb > + - const: ref Top level says you have minimum 4 clocks, not 2. You need to fix that, if this devices stays in this schema. Anyway your changes suggest device is quite different, so probably should not be here in the first place but in different schema, maybe new one. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml index 1636285fbe535c430fdf792b33a5e9c523de323b..eb21cfe734526fce670c540212a607a016cedf2c 100644 --- a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml @@ -18,6 +18,7 @@ properties: enum: - qcom,msm8998-qmp-usb3-phy - qcom,qcm2290-qmp-usb3-phy + - qcom,qcs615-qmp-dp-phy - qcom,qcs615-qmp-usb3-phy - qcom,sdm660-qmp-usb3-phy - qcom,sm6115-qmp-usb3-phy @@ -47,7 +48,7 @@ properties: const: 0 clock-output-names: - maxItems: 1 + maxItems: 2 "#phy-cells": const: 0 @@ -62,7 +63,8 @@ properties: items: - items: - description: phandle to TCSR hardware block - - description: offset of the VLS CLAMP register + - description: offset of the VLS CLAMP register in USB mode + and offset of the DP Phy mode register in DP mode description: Clamp register present in the TCSR ports: @@ -128,6 +130,21 @@ allOf: - const: com_aux - const: pipe + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs615-qmp-dp-phy + then: + properties: + clocks: + maxItems: 2 + clock-names: + items: + - const: cfg_ahb + - const: ref + additionalProperties: false examples:
Declare the DP QMP PHY present on the Qualcomm QCS615 platforms. Signed-off-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> --- .../bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-)