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Wed, 22 Jan 2025 06:34:48 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 Jan 2025 22:34:42 -0800 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , Subject: [PATCH v7 3/7] dt-bindings: PCI: qcom: Use sdx55 reg description for ipq9574 Date: Wed, 22 Jan 2025 12:04:07 +0530 Message-ID: <20250122063411.3503097-4-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250122063411.3503097-1-quic_varada@quicinc.com> References: <20250122063411.3503097-1-quic_varada@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: -JQPBpVa6J7rW8oZjQsEvU5Wb-pIS1cp X-Proofpoint-ORIG-GUID: -JQPBpVa6J7rW8oZjQsEvU5Wb-pIS1cp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-22_02,2025-01-22_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 mlxscore=0 adultscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 clxscore=1015 mlxlogscore=804 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501220046 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250121_223454_458001_4E33D4C3 X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org All DT entries except "reg" is similar between ipq5332 and ipq9574. ipq9574 has 5 registers while ipq5332 has 6. MHI is the additional (i.e. sixth entry). Since this matches with the sdx55's "reg" definition which allows for 5 or 6 registers, combine ipq9574 with sdx55. This change is to prepare ipq9574 to be used as ipq5332's fallback compatible. Signed-off-by: Varadarajan Narayanan Reviewed-by: Krzysztof Kozlowski Acked-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index bd87f6b49d68..413c6b76c26c 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -165,7 +165,6 @@ allOf: enum: - qcom,pcie-ipq6018 - qcom,pcie-ipq8074-gen3 - - qcom,pcie-ipq9574 then: properties: reg: @@ -206,6 +205,7 @@ allOf: compatible: contains: enum: + - qcom,pcie-ipq9574 - qcom,pcie-sdx55 then: properties: