Message ID | 20250414145729.343133-2-prabhakar.mahadev-lad.rj@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | Add USB2.0 PHY support for RZ/V2H(P) SoC | expand |
On Mon, 14 Apr 2025 15:57:26 +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > The RZ/G2L family requires two clocks for USB2 PHY, which are already > defined in the DTSI files. Add a constraint in the DT binding document > to ensure validation with `dtbs_check`. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml | 3 +++ > 1 file changed, 3 insertions(+) > Acked-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml index af275cea3456..f8d15f239b18 100644 --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml @@ -107,6 +107,9 @@ allOf: contains: const: renesas,rzg2l-usb2-phy then: + properties: + clocks: + minItems: 2 required: - resets