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Signed-off-by: Sandor Yu --- .../bindings/phy/cdns,hdptx-hdmi-phy.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/cdns,hdptx-hdmi-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/cdns,hdptx-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/cdns,hdptx-hdmi-phy.yaml new file mode 100644 index 000000000000..99352e655eec --- /dev/null +++ b/Documentation/devicetree/bindings/phy/cdns,hdptx-hdmi-phy.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/cdns,hdptx-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence HDP-TX(HDMI/DisplayPort) PHY for HDMI protocol + +maintainers: + - Sandor Yu + +properties: + compatible: + enum: + - cdns,hdptx-hdmi-phy + + reg: + maxItems: 1 + + clocks: + items: + - description: PHY reference clock. + - description: APB clock. + + clock-names: + items: + - const: refclk + - const: apbclk + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + #include + hdmi_phy: phy@32c00000 { + compatible = "cdns,hdptx-hdmi-phy"; + reg = <0x32c00000 0x100000>; + #phy-cells = <0>; + clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; + clock-names = "refclk", "apbclk"; + };