From patchwork Thu Feb 21 10:18:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Ni X-Patchwork-Id: 10823549 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8A25013B5 for ; Thu, 21 Feb 2019 10:20:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7864829B75 for ; Thu, 21 Feb 2019 10:20:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6CBE62B0A6; Thu, 21 Feb 2019 10:20:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 195F12A359 for ; Thu, 21 Feb 2019 10:20:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727830AbfBUKSz (ORCPT ); Thu, 21 Feb 2019 05:18:55 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:17406 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725814AbfBUKSy (ORCPT ); Thu, 21 Feb 2019 05:18:54 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 21 Feb 2019 02:18:59 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 21 Feb 2019 02:18:53 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 21 Feb 2019 02:18:53 -0800 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 21 Feb 2019 10:18:53 +0000 Received: from HQMAIL106.nvidia.com (172.18.146.12) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 21 Feb 2019 10:18:53 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 21 Feb 2019 10:18:52 +0000 Received: from niwei-ubuntu.nvidia.com (Not Verified[10.19.225.182]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 21 Feb 2019 02:18:52 -0800 From: Wei Ni To: , , CC: , , , , , , , Wei Ni Subject: [PATCH v2 00/12] Add some functionalities for Tegra soctherm Date: Thu, 21 Feb 2019 18:18:35 +0800 Message-ID: <1550744327-4677-1-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1550744339; bh=no6cRkG3wd5VqvNqeG4SGg7Ptb40dq1jqpxg95akVE0=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=njbpg3q97GHeYfhe4EFIy6tXBS1bCrtRmovCm5OWT2I/HV/8mc1U1+hS+ngXdUlxo 4ibriSGtBFGDeeHOR12KvXKSDBWfLukoLOQQmgt9O4qD56IbICLSKu0EkYV4mwyvIZ IgiZYUsabV2IomwTs4jd5M2XJQoC7qV1AU0An2odj3SMax8zjnBeH1GlRi0kaJlt/y dod5tbmhi9Yriclt8iOFCf9TdiDYXKstraRzya3hFR9DsgbKxsHbfY3E0+ZDoeOjja xcVXzbLzXQlrDFBrxNeN2GmJZmsrKGRDhqTfQcNDxEOfbXyFzSMaf3K/TVIka+pRkK SHRKb5WNPWIjA== Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Move the hw/sw shutdown patches into this serial. There already have some discussion for it in https://lkml.org/lkml/2018/12/7/225. Support GPU HW throttle, thermal IRQ, set_trips(), EDP IRQ and OC hw throttle. Main change from v1: 1. Use boolean for "nvidia,polarity-active-low". 2. Add suffix "-us" for "nvidia,throttle-period". Wei Ni (12): of: Add bindings of thermtrip for Tegra soctherm thermal: tegra: support hw and sw shutdown arm64: dts: tegra210: set thermtrip of: Add bindings of gpu hw throttle for Tegra soctherm thermal: tegra: add support for gpu hw-throttle arm64: dts: tegra210: set gpu hw throttle level thermal: tegra: add support for thermal IRQ thermal: tegra: add set_trips functionality thermal: tegra: add support for EDP IRQ arm64: dts: tegra210: set EDP interrupt line of: Add bindings of OC hw throttle for Tegra soctherm thermal: tegra: enable OC hw throttle .../bindings/thermal/nvidia,tegra124-soctherm.txt | 62 +- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 20 +- drivers/thermal/tegra/soctherm.c | 961 +++++++++++++++++++-- drivers/thermal/tegra/soctherm.h | 16 + drivers/thermal/tegra/tegra124-soctherm.c | 7 +- drivers/thermal/tegra/tegra132-soctherm.c | 7 +- drivers/thermal/tegra/tegra210-soctherm.c | 15 +- include/dt-bindings/thermal/tegra124-soctherm.h | 8 +- 8 files changed, 1020 insertions(+), 76 deletions(-)