Message ID | 1583201690-16068-1-git-send-email-peng.fan@nxp.com (mailing list archive) |
---|---|
Headers | show |
Series | Convert i.MX6Q cpufreq to use nvmem API | expand |
On 03-03-20, 10:14, peng.fan@nxp.com wrote: > From: Peng Fan <peng.fan@nxp.com> > > Use nvmem API is better compared with direclty accessing OCOTP registers. > nvmem could handle OCOTP clk, defer probe. > > Patch 1/3 is dts changes to add nvmem related properties > Patch 2/3 is a bug fix > Patch 3/3 is convert to nvmem API Should I apply patch 2 and 3 ? And you can take 1/3 via ARM Soc tree as this shouldn't break anything.
Hi Viresh, > Subject: Re: [PATCH 0/3] Convert i.MX6Q cpufreq to use nvmem API > > On 03-03-20, 10:14, peng.fan@nxp.com wrote: > > From: Peng Fan <peng.fan@nxp.com> > > > > Use nvmem API is better compared with direclty accessing OCOTP registers. > > nvmem could handle OCOTP clk, defer probe. > > > > Patch 1/3 is dts changes to add nvmem related properties Patch 2/3 is > > a bug fix Patch 3/3 is convert to nvmem API > > Should I apply patch 2 and 3 ? And you can take 1/3 via ARM Soc tree as this > shouldn't break anything. Please take patch 2 and 3. Without patch 1, it just use legacy method, not break things. Thanks, Peng. > > -- > viresh
On 03-03-20, 06:16, Peng Fan wrote: > Hi Viresh, > > > Subject: Re: [PATCH 0/3] Convert i.MX6Q cpufreq to use nvmem API > > > > On 03-03-20, 10:14, peng.fan@nxp.com wrote: > > > From: Peng Fan <peng.fan@nxp.com> > > > > > > Use nvmem API is better compared with direclty accessing OCOTP registers. > > > nvmem could handle OCOTP clk, defer probe. > > > > > > Patch 1/3 is dts changes to add nvmem related properties Patch 2/3 is > > > a bug fix Patch 3/3 is convert to nvmem API > > > > Should I apply patch 2 and 3 ? And you can take 1/3 via ARM Soc tree as this > > shouldn't break anything. > > Please take patch 2 and 3. Without patch 1, it just use legacy method, > not break things. Applied. Thanks.
From: Peng Fan <peng.fan@nxp.com> Use nvmem API is better compared with direclty accessing OCOTP registers. nvmem could handle OCOTP clk, defer probe. Patch 1/3 is dts changes to add nvmem related properties Patch 2/3 is a bug fix Patch 3/3 is convert to nvmem API Peng Fan (3): ARM: dts: imx: add nvmem property for cpu0 cpufreq: imx6q: fix error handling cpufreq: imx6q: read OCOTP through nvmem for imx6q arch/arm/boot/dts/imx6dl.dtsi | 2 ++ arch/arm/boot/dts/imx6q.dtsi | 2 ++ arch/arm/boot/dts/imx6qdl.dtsi | 7 ++++ arch/arm/boot/dts/imx6sl.dtsi | 9 ++++++ arch/arm/boot/dts/imx6sll.dtsi | 6 ++++ arch/arm/boot/dts/imx6sx.dtsi | 6 ++++ drivers/cpufreq/imx6q-cpufreq.c | 72 +++++++++++++++++++++++------------------ 7 files changed, 73 insertions(+), 31 deletions(-)