From patchwork Fri Nov 23 16:17:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10696157 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 718D313BF for ; Fri, 23 Nov 2018 16:17:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D9422C357 for ; Fri, 23 Nov 2018 16:17:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E24E2CB90; Fri, 23 Nov 2018 16:17:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8B9E72C357 for ; Fri, 23 Nov 2018 16:17:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410130AbeKXDCk (ORCPT ); Fri, 23 Nov 2018 22:02:40 -0500 Received: from mail.bootlin.com ([62.4.15.54]:37790 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2403840AbeKXDCj (ORCPT ); Fri, 23 Nov 2018 22:02:39 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 86A8220DD1; Fri, 23 Nov 2018 17:17:47 +0100 (CET) Received: from localhost.localdomain (unknown [37.164.168.97]) by mail.bootlin.com (Postfix) with ESMTPSA id 00A2020747; Fri, 23 Nov 2018 17:17:35 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Zhang Rui , Eduardo Valentin , Daniel Lezcano Cc: Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Antoine Tenart , Maxime Chevallier , Nadav Haklai , David Sniatkiwicz , Marc Zyngier , Russell King , Miquel Raynal Subject: [PATCH v2 0/6] Add hw overheat IRQ support to Marvell thermal driver Date: Fri, 23 Nov 2018 17:17:24 +0100 Message-Id: <20181123161730.11289-1-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello, This is the last batch of patches about the thermal driver that was suspended, waiting for the ICU/SEI series to be merged. Now that everything is ready in mainline, let's add hardware overheat interrupt support to this driver. Bindings and DT are updated accordingly. The interrupt will only be triggered if the platform goes above 102°C (threshold set to 100°C, hysteresis to > 2°C). The interrupt property is of course not mandatory. In the mean time, I add myself to the MAINTAINERS file to receive and review possible fixes/new features. Comments are welcome. Thanks, Miquèl Changes since v1: ================= * Use a threaded IRQ handler to avoid a potential lock depency when notifying the core of an overheat situation. Miquel Raynal (6): thermal: armada: add overheat interrupt support MAINTAINERS: thermal: add entry for Marvell MVEBU thermal driver dt-bindings: ap806: document the thermal interrupt capabilities dt-bindings: cp110: document the thermal interrupt capabilities arm64: dts: marvell: add interrupt support to ap806 thermal node arm64: dts: marvell: add interrupt support to cp110 thermal node .../arm/marvell/ap806-system-controller.txt | 8 + .../arm/marvell/cp110-system-controller.txt | 9 + MAINTAINERS | 5 + arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 18 +- arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 15 +- drivers/thermal/armada_thermal.c | 270 +++++++++++++++++- 6 files changed, 318 insertions(+), 7 deletions(-)