From patchwork Tue Dec 4 19:03:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10712431 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16241109C for ; Tue, 4 Dec 2018 19:03:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0A4212BC0B for ; Tue, 4 Dec 2018 19:03:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 07D9A2BD47; Tue, 4 Dec 2018 19:03:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6586D2BC30 for ; Tue, 4 Dec 2018 19:03:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725895AbeLDTDr (ORCPT ); Tue, 4 Dec 2018 14:03:47 -0500 Received: from mail.bootlin.com ([62.4.15.54]:45894 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725797AbeLDTDr (ORCPT ); Tue, 4 Dec 2018 14:03:47 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id B7E3520A5A; Tue, 4 Dec 2018 20:03:44 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.bootlin.com (Postfix) with ESMTPSA id 8B2F72074D; Tue, 4 Dec 2018 20:03:33 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Zhang Rui , Eduardo Valentin , Daniel Lezcano Cc: Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Antoine Tenart , Maxime Chevallier , Nadav Haklai , David Sniatkiwicz , Marc Zyngier , Russell King , Miquel Raynal Subject: [PATCH v3 0/6] Add hw overheat IRQ support to Marvell thermal driver Date: Tue, 4 Dec 2018 20:03:26 +0100 Message-Id: <20181204190332.10351-1-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello, This is the last batch of patches about the thermal driver that was suspended, waiting for the ICU/SEI series to be merged. Now that everything is ready in mainline, let's add hardware overheat interrupt support to this driver. Bindings and DT are updated accordingly. The interrupt will only be triggered if the platform goes above ~102°C (threshold set to 100°C, hysteresis to > 2°C). The interrupt property is of course not mandatory. In the mean time, I add myself to the MAINTAINERS file to receive and review possible fixes/new features. Thanks, Miquèl Changes since v2: ================= * Remove useless goto statement. * Move the hysteresis array out of the function using it and declare the array statically instead that doing so on the stack. * Remove unnecessary cast. * On error, avoid returning a value not compatible with irqreturn_t in the IRQ handler (and when doing so, re-enable interrupts first). This is simply handled with a goto statement. * 0 is not a valid interrupt, take this into account during variables validation. Changes *not* addressed since v2: ================================ * Overheat interrupt configuration has certain limitations on which Marc asked questions. I don't know if/what I need to change so keeping it like this for this version. * Eduardo pointed that once a critical level has been reached, there is no way back, the system will shutdown. I designed the handler to recover from that and to enable the IRQ again if needed, but maybe this is useless and should be removed. While waiting for his answer, I am sending another version and will correct in a v4 if needed. Changes since v1: ================= * Use a threaded IRQ handler to avoid a potential lock depency when notifying the core of an overheat situation. Miquel Raynal (6): thermal: armada: add overheat interrupt support MAINTAINERS: thermal: add entry for Marvell MVEBU thermal driver dt-bindings: ap806: document the thermal interrupt capabilities dt-bindings: cp110: document the thermal interrupt capabilities arm64: dts: marvell: add interrupt support to ap806 thermal node arm64: dts: marvell: add interrupt support to cp110 thermal node .../arm/marvell/ap806-system-controller.txt | 8 + .../arm/marvell/cp110-system-controller.txt | 9 + MAINTAINERS | 5 + arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 18 +- arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 15 +- drivers/thermal/armada_thermal.c | 270 +++++++++++++++++- 6 files changed, 318 insertions(+), 7 deletions(-)