From patchwork Wed Dec 12 21:18:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10727111 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8BABA6C5 for ; Wed, 12 Dec 2018 21:18:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7E89229B41 for ; Wed, 12 Dec 2018 21:18:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 699AA29A8E; Wed, 12 Dec 2018 21:18:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0DDB429A8E for ; Wed, 12 Dec 2018 21:18:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727061AbeLLVSy (ORCPT ); Wed, 12 Dec 2018 16:18:54 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:60408 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726440AbeLLVSy (ORCPT ); Wed, 12 Dec 2018 16:18:54 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5B286608CB; Wed, 12 Dec 2018 21:18:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1544649533; bh=GI4w9Dus5kwB9zBJ8Fbyj/63zcezntt6OLzPCV5QUgc=; h=From:To:Cc:Subject:Date:From; b=S+IRgSAVF0m67cK1KP59HKCcF+AUcxsxbV9YK+I0nMG83nCrlg4FSKCY5EBP0doTz tHW0sDSjOe8BiiPp+3YfVakg+bWGrIcPruE+TS4fVnzySOhVB6yHF6TPxCzlyOPk4P HI0pw/WzRx2EtVI67a9e/ETEbrG+1MOL++ULoKLs= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 329CF6030A; Wed, 12 Dec 2018 21:18:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1544649532; bh=GI4w9Dus5kwB9zBJ8Fbyj/63zcezntt6OLzPCV5QUgc=; h=From:To:Cc:Subject:Date:From; b=DWOKZ0Bc2jkGO3hZK/B+qc/h02Alpg4UsUpIliui1orbrWMVA9BvLQiY6RFE/j/wC sIimrKw3hD6/3qDmQC+54alW5JptadrQyUrBPF9kDV0F74MpTyjwv9F5vYHlrq9/4T J5pZVRnf/WVUOMqrgejlGZKrBb8yDL8mBtZFuc6Y= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 329CF6030A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: nm@ti.com, devicetree@vger.kernel.org, rnayak@codeaurora.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, dianders@chromium.org, vireshk@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 0/2] arm64: dts: Add sdm845 GPU/GMU and SMMU Date: Wed, 12 Dec 2018 14:18:46 -0700 Message-Id: <20181212211848.26768-1-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that more of the sdm845 bindings are headed upstream this a refresh of of https://patchwork.freedesktop.org/series/39308/ to add bindings and nodes for the GPU/GMU and GPU SMMU for sdm845. This is based on : git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git for-next with: https://lore.kernel.org/patchwork/patch/1018365/ This change requires the following dependencies: include/dt-bindings/power/qcom-rpmpd.h: https://patchwork.kernel.org/patch/10711119/ qcom,smmu-v2 binding: https://patchwork.kernel.org/patch/10581911/ v6: Update GPU bindings for a6xx and make the examples match the nodes and vice versa. Clean up types and rebase on https://lore.kernel.org/patchwork/patch/1018365/ to help facilitate merging. v5: Use symbolic names for the RPMH power levels defined in OPP table, move the opp tables as children of their respective nodes and rename the iommu device. v4: Rebase v3: Split GMU PDC region into two GPU specific sections, fix indentation, really use qcom,gmu for the phandle name v2: changed qcom,arc-level to qcom,level following discussion with Viresh; change gmu phandle to qcom,gmu per Rob *** BLURB HERE *** Jordan Crouse (2): dt-bindings: drm/msm/a6xx: Document GMU and update GPU bindings arm64: dts: sdm845: Add gpu and gmu device nodes .../devicetree/bindings/display/msm/gmu.txt | 56 ++++++++ .../devicetree/bindings/display/msm/gpu.txt | 41 +++++- arch/arm64/boot/dts/qcom/sdm845.dtsi | 123 ++++++++++++++++++ 3 files changed, 217 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/gmu.txt