From patchwork Thu Jun 27 12:52:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 11019653 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9B0A81708 for ; Thu, 27 Jun 2019 12:52:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8DE9228A71 for ; Thu, 27 Jun 2019 12:52:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8121828A81; Thu, 27 Jun 2019 12:52:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3290728A71 for ; Thu, 27 Jun 2019 12:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727088AbfF0Mwu (ORCPT ); Thu, 27 Jun 2019 08:52:50 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:48181 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726431AbfF0Mwu (ORCPT ); Thu, 27 Jun 2019 08:52:50 -0400 X-Originating-IP: 86.250.200.211 Received: from localhost.localdomain (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id DA155E0008; Thu, 27 Jun 2019 12:52:46 +0000 (UTC) From: Miquel Raynal To: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Thomas Petazzoni , Antoine Tenart , Gregory Clement , Maxime Chevallier , Nadav Haklai , Bjorn Helgaas , "Rafael J . Wysocki" , linux-pm@vger.kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= , Miquel Raynal Subject: [PATCH v3 0/4] Prepare Armada 3700 PCIe suspend to RAM support Date: Thu, 27 Jun 2019 14:52:41 +0200 Message-Id: <20190627125245.26788-1-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello, As part of an effort to bring suspend to RAM support to the Armada 3700 SoC (main target: ESPRESSObin board), there are small things to do in the Armada 3700 peripherals clock driver: * On this SoC, the PCIe controller gets fed by a gated clock in the south bridge. This clock is missing in the current driver, patch 1 adds it. * Because of a constraint in the PCI core, the resume function of a PCIe controller driver must be run at an early stage (->suspend/resume_noirq()), before the core tries to ->read/write() in the PCIe registers to do more configuration. Hence, the PCIe clock must be resumed before. This is enforced thanks to two changes: 1/ Add device links to the clock framework. This enforce order in the PM core: the clocks are resumed before the consumers. Series has been posted, see [1]. 2/ Even with the above feature, the clock's resume() callback is called after the PCI controller's resume_noirq() callback. The only way to fix this is to change the "priority" of the clock suspend/resume callbacks. This is done in patch 2. * The bindings are updated with the PCI clock in patch 4 while patch 3 is just a typo correction in the same file. If there is anything unclear please feel free to ask. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-November/614527.html Thanks, Miquèl Changes in v3: ============== * Fixed one typo: s/their register/their registers/. Changes in v2: ============== * Rebased on top of v5.2-rc1. * Added Rob's R-by tags. * No change on the "change suspend/resume time" patch as, despite my pings, I got no answer and IMHO the proposed approach is entirely valid. Miquel Raynal (4): clk: mvebu: armada-37xx-periph: add PCIe gated clock clk: mvebu: armada-37xx-periph: change suspend/resume time dt-bindings: clk: armada3700: fix typo in SoC name dt-bindings: clk: armada3700: document the PCIe clock .../devicetree/bindings/clock/armada3700-periph-clock.txt | 5 +++-- drivers/clk/mvebu/armada-37xx-periph.c | 6 ++++-- 2 files changed, 7 insertions(+), 4 deletions(-)