From patchwork Thu Apr 18 08:28:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13634341 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1FC84D35; Thu, 18 Apr 2024 08:28:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713428906; cv=none; b=Ehp4qPjlp1v03CzlEfyjNe1o/YF1nCywyqdr1opR4FIZ+5lc7O5myTUwHDtdkEEpwbJg1tjJw5JNHgFPkFnleQlp1AB07cZxVR5KEoBnawscp6CpyEIkTbCZQDhRJqmGMxHH0X4dgdvFVDxRplIXvKNs312KiCxMH7KnJvn5TZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713428906; c=relaxed/simple; bh=cfVNYsUPgywX7nORcsf9DpB+ovLAotJOt02kBBHC6f4=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=ZWppJg+JkTL8SF7tDinne38m3Dh70ugvXwKGVOHjoahq1cW2dD+4yXD9vkLwIhfyUn5r5Q59b5BQZGiivpdIpBqX9NjXSEkR99srzVkaJrxipoGs+NWH2E+6jhr1vs+pL9lozz54wrBROUALwACfFn5JFYnTx4WBDOBYV3O6g9s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=2sy5uL3g; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="2sy5uL3g" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1713428896; bh=cfVNYsUPgywX7nORcsf9DpB+ovLAotJOt02kBBHC6f4=; h=From:To:Cc:Subject:Date:From; b=2sy5uL3gJyn1mF0gbAQKtCHc9l+I0X6a3Tn0Ddzx6kTpiQJxltbmrsL+hv42oaQH1 KBVrexZK2kzosRO1eflQO+jQxwwackh4aWXYlyosTgEpgoleqoeE7720G7cU7dsLDc /gV4lcH8GQHebhqHeLDxpn2hrLwuKhML4viu3nOYpVV79MiFd9Gf1ZPydfAGQkPQ+c gvn6/ZLdEdTjEP//QhbJdkMXmKHCPx8w1MYTJRXGZceo+FvKZm0l9BOkaXL/b+i24Z r9IEHSyAFmZW/bpFETE6OBwrcrMvm/a0uLMqKNw0fVblEz3XyPAb+7cMKNy3+Spogi sUMs7fBbTFlQg== Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 7B396378208C; Thu, 18 Apr 2024 08:28:15 +0000 (UTC) From: AngeloGioacchino Del Regno To: djakov@kernel.org Cc: robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, lgirdwood@gmail.com, broonie@kernel.org, keescook@chromium.org, gustavoars@kernel.org, henryc.chen@mediatek.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, wenst@chromium.org, amergnat@baylibre.com Subject: [PATCH v3 0/7] MediaTek DVFSRC Bus Bandwidth and Regulator knobs Date: Thu, 18 Apr 2024 10:28:05 +0200 Message-ID: <20240418082812.152270-1-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Changes in v3: - Removed examples from interconnect and regulator bindings and kept example node with interconnect and regulator in the main DVFSRC binding as suggested - Removed 'reg' from interconnect and regulator, removed both address and size cells from the main DVFSRC binding as that was not really needed - Added anyOf-required entries in the regulator binding as it doesn't make sense to probe it without any regulator subnode Changes in v2: - Fixed issues with regulator binding about useless quotes and wrong binding path (oops) - Removed useless 'items' from DVFSRC main binding - Allowed address/size cells to DVFSRC main binding to resolve validation issues on the regulator and interconnect bindings - Changed dvfsrc node name to `system-controller`, as the DVFSRC is actually able to control multiple system components. - Added a commit to remove mtk-dvfs-regulator.c before adding the new, refactored regulator driver This series adds support for the MediaTek Dynamic Voltage and Frequency Scaling Resource Controller (DVFSRC), found on many MediaTek SoCs. This hardware collects requests from both software and the various remote processors embededd into the SoC, and decides about a minimum operating voltage and a minimum DRAM frequency to fulfill those requests, in an effort to provide the best achievable performance per watt. Such hardware IP is capable of transparently performing direct register R/W on all of the DVFSRC-controlled regulators and SoC bandwidth knobs. Summarizing how the DVFSRC works for Interconnect: ICC provider ICC Nodes ---- ---- _________ |CPU | |--- |VPU | _____ | |----- ---- | ---- | |->| DRAM | ---- | ---- |DRAM |->|scheduler|----- |GPU | |--- |DISP| | |->| (EMI) | ---- | ---- |_____|->|_________|---. ----- | ---- /|\ `-|MMSYS|--|--- |VDEC| | ----- | ---- | | ---- | change DRAM freq |--- |VENC| -------- | ---- SMC --> | DVFSRC | | ---- -------- |--- |IMG | | ---- | ---- |--- |CAM | ---- ...and for regulators, it's simply... SMC -> DVFSRC -> Regulator voltage decider -> (vreg) Registers R/W Please note that this series is based on an old (abandoned) series from MediaTek [1], and reuses some parts of the code found in that. Besides, included in this series, there's also a refactoring of the mtk-dvfsrc-regulator driver, which never got compiled at all, and would not build anyway because of missing headers and typos: that commit did not get any Fixes tag because, well, backporting makes no sense at all as the DVFSRC support - which is critical for that driver to work - is introduced with *this series*! :-) P.S.: The DVFSRC regulator is a requirement for the MediaTek UFSHCI controller's crypto boost feature, which is already upstream but lacking the actual regulator to work....... :-) [1]: https://lore.kernel.org/all/20210812085846.2628-1-dawei.chien@mediatek.com/ AngeloGioacchino Del Regno (7): dt-bindings: regulator: Add bindings for MediaTek DVFSRC Regulators dt-bindings: interconnect: Add MediaTek EMI Interconnect bindings dt-bindings: soc: mediatek: Add DVFSRC bindings for MT8183 and MT8195 soc: mediatek: Add MediaTek DVFS Resource Collector (DVFSRC) driver regulator: Remove mtk-dvfsrc-regulator.c regulator: Add refactored mtk-dvfsrc-regulator driver interconnect: mediatek: Add MediaTek MT8183/8195 EMI Interconnect driver .../interconnect/mediatek,mt8183-emi.yaml | 51 ++ .../mediatek,mt6873-dvfsrc-regulator.yaml | 43 ++ .../soc/mediatek/mediatek,mt8183-dvfsrc.yaml | 94 +++ drivers/interconnect/Kconfig | 1 + drivers/interconnect/Makefile | 1 + drivers/interconnect/mediatek/Kconfig | 32 + drivers/interconnect/mediatek/Makefile | 5 + drivers/interconnect/mediatek/icc-emi.c | 153 +++++ drivers/interconnect/mediatek/icc-emi.h | 40 ++ drivers/interconnect/mediatek/mt8183.c | 143 +++++ drivers/interconnect/mediatek/mt8195.c | 339 +++++++++++ drivers/regulator/mtk-dvfsrc-regulator.c | 242 ++++---- drivers/soc/mediatek/Kconfig | 11 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/mtk-dvfsrc.c | 551 ++++++++++++++++++ .../interconnect/mediatek,mt8183.h | 23 + .../interconnect/mediatek,mt8195.h | 44 ++ include/linux/soc/mediatek/dvfsrc.h | 36 ++ include/linux/soc/mediatek/mtk_sip_svc.h | 3 + 19 files changed, 1683 insertions(+), 130 deletions(-) create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml create mode 100644 Documentation/devicetree/bindings/regulator/mediatek,mt6873-dvfsrc-regulator.yaml create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml create mode 100644 drivers/interconnect/mediatek/Kconfig create mode 100644 drivers/interconnect/mediatek/Makefile create mode 100644 drivers/interconnect/mediatek/icc-emi.c create mode 100644 drivers/interconnect/mediatek/icc-emi.h create mode 100644 drivers/interconnect/mediatek/mt8183.c create mode 100644 drivers/interconnect/mediatek/mt8195.c create mode 100644 drivers/soc/mediatek/mtk-dvfsrc.c create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h create mode 100644 include/linux/soc/mediatek/dvfsrc.h