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[0/2] ti-cpufreq: AM62: Backward compatibility for syscon and update offsets

Message ID 20240930-b4-ti-cpufreq-am62-quirk-v1-0-b5e04f0f899b@ti.com (mailing list archive)
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Series ti-cpufreq: AM62: Backward compatibility for syscon and update offsets | expand

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Dhruva Gole Sept. 30, 2024, 9:32 a.m. UTC
With the Silicon revision being taken directly from socinfo, there's no
longer any need for reading any SOC register for revision from this driver.
Hence, we do not require any rev_offset for AM62 family of devices.

Also, maintain the backward compatibility with old devicetree, and hence
add condition to handle the case where we have the zero offset such that we
don't end up reading the wrong register offset in new AM625 DTs whenever we fix
them up.

These patches have been in discussion as part of another series, which is now
being split up as per discussions with Nishanth. Ref. the following link for
more context on the same:
https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/

**DEPENDS ON:**
"mfd: syscon: Use regmap max_register_is_0 as needed"
https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/

This series has been tested on AM625 on top of above patch:
https://gist.github.com/DhruvaG2000/40b80cc04a9ac90c86445d6e67ece4cb

Signed-off-by: Dhruva Gole <d-gole@ti.com>
---
Dhruva Gole (2):
      cpufreq: ti-cpufreq: Allow backward compatibility for efuse syscon
      cpufreq: ti-cpufreq: Remove revision offsets in AM62 family

 drivers/cpufreq/ti-cpufreq.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)
---
base-commit: cea5425829f77e476b03702426f6b3701299b925
change-id: 20240930-b4-ti-cpufreq-am62-quirk-46242e3daa2b

Best regards,

Comments

Dhruva Gole Oct. 1, 2024, 7:57 a.m. UTC | #1
On Sep 30, 2024 at 15:02:08 +0530, Dhruva Gole wrote:
> With the Silicon revision being taken directly from socinfo, there's no
> longer any need for reading any SOC register for revision from this driver.
> Hence, we do not require any rev_offset for AM62 family of devices.
> 
> Also, maintain the backward compatibility with old devicetree, and hence
> add condition to handle the case where we have the zero offset such that we
> don't end up reading the wrong register offset in new AM625 DTs whenever we fix
> them up.
> 
> These patches have been in discussion as part of another series, which is now
> being split up as per discussions with Nishanth. Ref. the following link for
> more context on the same:
> https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/
> 
> **DEPENDS ON:**
> "mfd: syscon: Use regmap max_register_is_0 as needed"
> https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/

Just an update, the above dependency patch is now taken in by Lee Jones [1].
Waiting for it to finally appear in -next.

+ Lee just because we are users of that patch.

[1]
https://lore.kernel.org/linux-arm-kernel/172770742318.523866.16912261914335612487.b4-ty@kernel.org/
Viresh Kumar Oct. 1, 2024, 8:04 a.m. UTC | #2
On 01-10-24, 13:27, Dhruva Gole wrote:
> On Sep 30, 2024 at 15:02:08 +0530, Dhruva Gole wrote:
> > With the Silicon revision being taken directly from socinfo, there's no
> > longer any need for reading any SOC register for revision from this driver.
> > Hence, we do not require any rev_offset for AM62 family of devices.
> > 
> > Also, maintain the backward compatibility with old devicetree, and hence
> > add condition to handle the case where we have the zero offset such that we
> > don't end up reading the wrong register offset in new AM625 DTs whenever we fix
> > them up.
> > 
> > These patches have been in discussion as part of another series, which is now
> > being split up as per discussions with Nishanth. Ref. the following link for
> > more context on the same:
> > https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/
> > 
> > **DEPENDS ON:**
> > "mfd: syscon: Use regmap max_register_is_0 as needed"
> > https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/
> 
> Just an update, the above dependency patch is now taken in by Lee Jones [1].
> Waiting for it to finally appear in -next.
> 
> + Lee just because we are users of that patch.
> 
> [1]
> https://lore.kernel.org/linux-arm-kernel/172770742318.523866.16912261914335612487.b4-ty@kernel.org/

Ping me once this series is ready to be applied and all dependencies
are merged somewhere I can rebase.
Dhruva Gole Oct. 3, 2024, 9:13 a.m. UTC | #3
Viresh,

On Oct 01, 2024 at 13:34:00 +0530, Viresh Kumar wrote:
> On 01-10-24, 13:27, Dhruva Gole wrote:
> > On Sep 30, 2024 at 15:02:08 +0530, Dhruva Gole wrote:
> > > With the Silicon revision being taken directly from socinfo, there's no
> > > longer any need for reading any SOC register for revision from this driver.
> > > Hence, we do not require any rev_offset for AM62 family of devices.
> > > 
> > > Also, maintain the backward compatibility with old devicetree, and hence
> > > add condition to handle the case where we have the zero offset such that we
> > > don't end up reading the wrong register offset in new AM625 DTs whenever we fix
> > > them up.
> > > 
> > > These patches have been in discussion as part of another series, which is now
> > > being split up as per discussions with Nishanth. Ref. the following link for
> > > more context on the same:
> > > https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/
> > > 
> > > **DEPENDS ON:**
> > > "mfd: syscon: Use regmap max_register_is_0 as needed"
> > > https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/
> > 
> > Just an update, the above dependency patch is now taken in by Lee Jones [1].
> > Waiting for it to finally appear in -next.
> > 
> > + Lee just because we are users of that patch.
> > 
> > [1]
> > https://lore.kernel.org/linux-arm-kernel/172770742318.523866.16912261914335612487.b4-ty@kernel.org/
> 
> Ping me once this series is ready to be applied and all dependencies
> are merged somewhere I can rebase.

I can see the dependency is part of next-20241003, please feel free to pick the
series now if it looks ok to you.
Nishanth Menon Oct. 3, 2024, 5:13 p.m. UTC | #4
On 15:02-20240930, Dhruva Gole wrote:
> With the Silicon revision being taken directly from socinfo, there's no
> longer any need for reading any SOC register for revision from this driver.
> Hence, we do not require any rev_offset for AM62 family of devices.
> 
> Also, maintain the backward compatibility with old devicetree, and hence
> add condition to handle the case where we have the zero offset such that we
> don't end up reading the wrong register offset in new AM625 DTs whenever we fix
> them up.
> 
> These patches have been in discussion as part of another series, which is now
> being split up as per discussions with Nishanth. Ref. the following link for
> more context on the same:
> https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/
> 
> **DEPENDS ON:**
> "mfd: syscon: Use regmap max_register_is_0 as needed"
> https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/
> 
> This series has been tested on AM625 on top of above patch:
> https://gist.github.com/DhruvaG2000/40b80cc04a9ac90c86445d6e67ece4cb
> 
> Signed-off-by: Dhruva Gole <d-gole@ti.com>
> ---
> Dhruva Gole (2):
>       cpufreq: ti-cpufreq: Allow backward compatibility for efuse syscon
>       cpufreq: ti-cpufreq: Remove revision offsets in AM62 family
> 
>  drivers/cpufreq/ti-cpufreq.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> ---
> base-commit: cea5425829f77e476b03702426f6b3701299b925
> change-id: 20240930-b4-ti-cpufreq-am62-quirk-46242e3daa2b
> 
> Best regards,
> -- 
> Dhruva Gole <d-gole@ti.com>
> 

Reviewed-by: Nishanth Menon <nm@ti.com>

Viresh,

The existing device tree works with this changes even without the
dependency being merged. DT update can happen in the next window once
the pieces are merged together.
Viresh Kumar Oct. 10, 2024, 7:23 a.m. UTC | #5
On 03-10-24, 12:13, Nishanth Menon wrote:
> The existing device tree works with this changes even without the
> dependency being merged. DT update can happen in the next window once
> the pieces are merged together.

Ahh, so I can just apply them directly. Thanks for clarifying that.
Viresh Kumar Oct. 10, 2024, 7:26 a.m. UTC | #6
On 30-09-24, 15:02, Dhruva Gole wrote:
> With the Silicon revision being taken directly from socinfo, there's no
> longer any need for reading any SOC register for revision from this driver.
> Hence, we do not require any rev_offset for AM62 family of devices.
> 
> Also, maintain the backward compatibility with old devicetree, and hence
> add condition to handle the case where we have the zero offset such that we
> don't end up reading the wrong register offset in new AM625 DTs whenever we fix
> them up.
> 
> These patches have been in discussion as part of another series, which is now
> being split up as per discussions with Nishanth. Ref. the following link for
> more context on the same:
> https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/
> 
> **DEPENDS ON:**
> "mfd: syscon: Use regmap max_register_is_0 as needed"
> https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/

Applied. Thanks.