From patchwork Mon Jul 1 22:47:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 2810351 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8E5C4BF4A1 for ; Mon, 1 Jul 2013 22:47:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9D68020188 for ; Mon, 1 Jul 2013 22:47:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BA3402018E for ; Mon, 1 Jul 2013 22:47:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755603Ab3GAWrl (ORCPT ); Mon, 1 Jul 2013 18:47:41 -0400 Received: from mail.free-electrons.com ([94.23.35.102]:43517 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755601Ab3GAWrk (ORCPT ); Mon, 1 Jul 2013 18:47:40 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 2517A1C15; Tue, 2 Jul 2013 00:47:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from localhost.localdomain (unknown [190.2.109.25]) by mail.free-electrons.com (Postfix) with ESMTPA id 69A7F77F; Tue, 2 Jul 2013 00:47:37 +0200 (CEST) From: Ezequiel Garcia To: , Cc: Andrew Lunn , Jason Cooper , Thomas Petazzoni , Gregory Clement , Sebastian Hesselbarth , Lior Amsalem , Simon Guinot , Russell King , Ezequiel Garcia , Assaf Hoffman Subject: [RFC/PATCH 1/2] ARM: feroceon: Add suspend/resume operation Date: Mon, 1 Jul 2013 19:47:28 -0300 Message-Id: <1372718849-2912-2-git-send-email-ezequiel.garcia@free-electrons.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1372718849-2912-1-git-send-email-ezequiel.garcia@free-electrons.com> References: <1372718849-2912-1-git-send-email-ezequiel.garcia@free-electrons.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for suspend/resume operations. The implemented procedures are identical to the ones for ARM926. Cc: Assaf Hoffman Cc: Russell King Signed-off-by: Ezequiel Garcia --- arch/arm/Kconfig | 2 +- arch/arm/mm/proc-feroceon.S | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2651b1d..a35287b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2207,7 +2207,7 @@ source "kernel/power/Kconfig" config ARCH_SUSPEND_POSSIBLE depends on !ARCH_S5PC100 - depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ + depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \ CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK def_bool y diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index 4106b09..ac9201c 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S @@ -514,6 +514,32 @@ ENTRY(cpu_feroceon_set_pte_ext) #endif mov pc, lr +/* Suspend/resume support: taken from arch/arm/mm/proc-arm926.S */ +.globl cpu_feroceon_suspend_size +.equ cpu_feroceon_suspend_size, 4 * 3 +#ifdef CONFIG_ARM_CPU_SUSPEND +ENTRY(cpu_feroceon_do_suspend) + stmfd sp!, {r4 - r6, lr} + mrc p15, 0, r4, c13, c0, 0 @ PID + mrc p15, 0, r5, c3, c0, 0 @ Domain ID + mrc p15, 0, r6, c1, c0, 0 @ Control register + stmia r0, {r4 - r6} + ldmfd sp!, {r4 - r6, pc} +ENDPROC(cpu_feroceon_do_suspend) + +ENTRY(cpu_feroceon_do_resume) + mov ip, #0 + mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs + mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches + ldmia r0, {r4 - r6} + mcr p15, 0, r4, c13, c0, 0 @ PID + mcr p15, 0, r5, c3, c0, 0 @ Domain ID + mcr p15, 0, r1, c2, c0, 0 @ TTB address + mov r0, r6 @ control register + b cpu_resume_mmu +ENDPROC(cpu_feroceon_do_resume) +#endif + __CPUINIT .type __feroceon_setup, #function