From patchwork Thu Nov 7 13:07:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Krishna Chatradhi X-Patchwork-Id: 3152391 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1DC599F461 for ; Thu, 7 Nov 2013 13:06:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D6BC9200DA for ; Thu, 7 Nov 2013 13:06:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9B9A3200ED for ; Thu, 7 Nov 2013 13:06:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750996Ab3KGNGP (ORCPT ); Thu, 7 Nov 2013 08:06:15 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:40591 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750725Ab3KGNGO (ORCPT ); Thu, 7 Nov 2013 08:06:14 -0500 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MVW00JLE9Q65010@mailout3.samsung.com>; Thu, 07 Nov 2013 22:06:12 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id F2.24.06969.4409B725; Thu, 07 Nov 2013 22:06:12 +0900 (KST) X-AuditID: cbfee68f-b7f836d000001b39-67-527b904460c3 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 2A.14.08134.4409B725; Thu, 07 Nov 2013 22:06:12 +0900 (KST) Received: from naveen-linux.sisodomain.com ([107.108.83.161]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MVW009499Q7LLA0@mmp2.samsung.com>; Thu, 07 Nov 2013 22:06:12 +0900 (KST) From: Naveen Krishna Chatradhi To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: t.figa@samsung.com, naveenkrishna.ch@gmail.com, amit.daniel@samsung.com, kgene.kim@samsung.com, devicetree@vger.kernel.org, cpgs@samsung.com Subject: [PATCH v2] ARM: dts: Exynos5420: Add device nodes for TMU blocks Date: Thu, 07 Nov 2013 18:37:49 +0530 Message-id: <1383829669-1271-1-git-send-email-ch.naveen@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1382004240-3282-1-git-send-email-l.krishna@samsung.com> References: <1382004240-3282-1-git-send-email-l.krishna@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsWyRsSkStdlQnWQwd/dwhYNV0MsXh7StJh/ 5ByrRe+Cq2wWn3uPMFrMOL+PyWLRtv/MFutnvGZx4PDYOesuu0ffllWMHp83yQUwR3HZpKTm ZJalFunbJXBlPJvQz1bwWKhifuMitgbGJv4uRk4OCQETiVXtZ9kgbDGJC/fWA9lcHEICSxkl TrRvZ4EpurV6KjuILSQwnVHiS6cPRFEPk8T2jdPAEmwCZhIHF60Gs0UE7CXmbpvMBFLELDCJ UaLl6UKgsRwcwgKeEn/Xh4DUsAioSuxpXQ22mVfARWJJ2yt2iGWKEt3PJoDFOQVcJX6/OsQE sdhFYve+H6wgMyUE+tklDqy6wQgxSEDi2+RDLCDzJQRkJTYdYIaYIylxcMUNlgmMwgsYGVYx iqYWJBcUJ6UXGesVJ+YWl+al6yXn525iBAb26X/P+ncw3j1gfYgxGWjcRGYp0eR8YGTklcQb GpsZWZiamBobmVuakSasJM57/2FSkJBAemJJanZqakFqUXxRaU5q8SFGJg5OqQbGyOW8XDc9 Gl8uy2Cdfzhe6cDLSfPTnn9zbTod8sj7o8nSfVfzdsS+3nDG1qWtdeG2CayLfO9cm1woomj6 PjhQlc0k/PDqAINfb9wLc17+unyepXrakRNJJtJp3gs3LJvrHGaUNP8h88O36yMnOOzbZbBh 99m7ItNm5TA6nnb+YnE+MinshP/ceUosxRmJhlrMRcWJAJVeqNeCAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrDIsWRmVeSWpSXmKPExsVy+t9jQV2XCdVBBptXcFk0XA2xeHlI02L+ kXOsFr0LrrJZfO49wmgx4/w+JotF2/4zW6yf8ZrFgcNj56y77B59W1YxenzeJBfAHNXAaJOR mpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+TiE6DrlpkDdICSQlliTilQ KCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0kLCGMePZhH62gsdCFfMbF7E1MDbxdzFyckgI mEjcWj2VHcIWk7hwbz0biC0kMJ1R4kunTxcjF5DdwySxfeM0sCI2ATOJg4tWg9kiAvYSc7dN ZgIpYhaYxCjR8nQhUDcHh7CAp8Tf9SEgNSwCqhJ7WleDDeUVcJFY0vYKapmiRPezCWBxTgFX id+vDjFBLHaR2L3vB+sERt4FjAyrGEVTC5ILipPSc430ihNzi0vz0vWS83M3MYLj5pn0DsZV DRaHGAU4GJV4eGfUVAUJsSaWFVfmHmKU4GBWEuHd31cdJMSbklhZlVqUH19UmpNafIgxGeiq icxSosn5wJjOK4k3NDYxNzU2tTSxMDGzJE1YSZz3YKt1oJBAemJJanZqakFqEcwWJg5OqQbG +TLTr/2SMbIpFrzmvm+r6oHwgp2p4k/f60vYMVe3e8ewBB2IPzm7TNT6Do9OlvkhBeVvtwsX Hntm9un5d2/27zuONOrqCoa/cupduuwvb0Hf7xkvX60zm9LsKrfM/Ocvz54n7X/2hZVOlaif w1hr/8BhU9S3yDuK134usQyb4vD61ZHAV7lSSizFGYmGWsxFxYkApIN3VN8CAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos5420 SoC has per core thermal management unit. 5 TMU channels 4 for CPUs and 5th for GPU. This patch adds the device tree nodes to the DT device list. Nodes carry the misplaced second base address and the second clock to access the misplaced base address. Signed-off-by: Leela Krishna Amudala Signed-off-by: Naveen Krishna Chatradhi Signed-off-by: Andrew Bresticker --- Changes since v1: 1. Nodes carry the misplaced second base address and the second clock to access the misplaced base address. 2. Correct the clock number for the TMU4 arch/arm/boot/dts/exynos5420.dtsi | 48 +++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 6ffefd1..d736b40 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -369,4 +369,52 @@ clock-names = "gscl"; samsung,power-domain = <&gsc_pd>; }; + + /* tmu for CPU0 */ + tmu@10060000 { + compatible = "samsung,exynos5420-tmu"; + reg = <0x10060000 0x100>; + interrupts = <0 65 0>; + clocks = <&clock 318>; + clock-names = "tmu_apbif"; + }; + + /* tmu for CPU1 */ + tmu@10064000 { + compatible = "samsung,exynos5420-tmu"; + reg = <0x10064000 0x100>; + interrupts = <0 183 0>; + clocks = <&clock 318>; + clock-names = "tmu_apbif"; + }; + + /* tmu for CPU2 */ + tmu@10068000 { + compatible = "samsung,exynos5420-tmu"; + /* 2nd reg is for the misplaced TRIMINFO register */ + reg = <0x10068000 0x100>, <0x1006c000 0x4>; + interrupts = <0 184 0>; + clocks = <&clock 318>; + clock-names = "tmu_apbif"; + }; + + /* tmu for CPU3 */ + tmu@1006c000 { + compatible = "samsung,exynos5420-tmu"; + /* 2nd reg is for the misplaced TRIMINFO register */ + reg = <0x1006c000 0x100>, <0x100a0000 0x4>; + interrupts = <0 185 0>; + clocks = <&clock 318>, <&clock 319>; + clock-names = "tmu_apbif", "tmu_apbif_triminfo"; + }; + + /* tmu for GPU */ + tmu@100a0000 { + compatible = "samsung,exynos5420-tmu"; + /* 2nd reg is for the misplaced TRIMINFO register */ + reg = <0x100a0000 0x100>, <0x10068000 0x4>; + interrupts = <0 215 0>; + clocks = <&clock 319>, <&clock 318>; + clock-names = "tmu_apbif", "tmu_apbif_triminfo"; + }; };