From patchwork Fri Jun 20 14:27:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: dirk.brandewie@gmail.com X-Patchwork-Id: 4389781 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D92EC9F314 for ; Fri, 20 Jun 2014 14:28:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E67AC20397 for ; Fri, 20 Jun 2014 14:28:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 48A00203DA for ; Fri, 20 Jun 2014 14:28:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752069AbaFTO2P (ORCPT ); Fri, 20 Jun 2014 10:28:15 -0400 Received: from mail-pb0-f51.google.com ([209.85.160.51]:46198 "EHLO mail-pb0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752834AbaFTO2N (ORCPT ); Fri, 20 Jun 2014 10:28:13 -0400 Received: by mail-pb0-f51.google.com with SMTP id rp16so3192728pbb.10 for ; Fri, 20 Jun 2014 07:28:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d4snuLkO7yJL099uI4N/+0VV5Rt4O8Cw+AAMmj8igq8=; b=Hmy0dMfQu3uRTZzAq3zGf2sfVMhRUxySItx4tChAq3aaQAehBA+1vqEHeiQ6ZNpXrD BJfbmvByR/d4G55woGKZbyOPL/t5XzkVVUuefHgKvEDjWbHns/RYax+lgRFI4Cb1aLEe 4u1/8cZ29BpFQ/yVW2D6/K6uwcJ6MQRK8lZISKjf/9oxZLg6vEeR4JGC70qo6yDHeUlu VUQ3RrvKJ7NQw2nXTxAPuAvNEd+JCbKp6zO6gi6jET5vAQnevlrx+LxMjKssXI+QjXsH N11ImMdOmbmBUgEIkFctpViP+fOFMTfkwIMh05FSQZtcy3NVF5kEUHR8N3B2klbGBYln TJ8w== X-Received: by 10.68.133.163 with SMTP id pd3mr5111437pbb.166.1403274493273; Fri, 20 Jun 2014 07:28:13 -0700 (PDT) Received: from echolake.localdomain (static-50-43-41-81.bvtn.or.frontiernet.net. [50.43.41.81]) by mx.google.com with ESMTPSA id vx10sm44287848pac.17.2014.06.20.07.28.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Jun 2014 07:28:12 -0700 (PDT) From: dirk.brandewie@gmail.com X-Google-Original-From: dirk.j.brandewie@intel.com To: linux-pm@vger.kernel.org Cc: rjw@rjwysocki.net, dirk.brandewie@gmail.com, stable@vger.kernel.org, Dirk Brandewie Subject: [PATCH 2/3] intel_pstate: don't touch turbo bit if turbo disabled or unavailable. Date: Fri, 20 Jun 2014 07:27:59 -0700 Message-Id: <1403274480-10593-3-git-send-email-dirk.j.brandewie@intel.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1403274480-10593-1-git-send-email-dirk.j.brandewie@intel.com> References: <1403274480-10593-1-git-send-email-dirk.j.brandewie@intel.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dirk Brandewie If turbo is disabled in the BIOS bit 38 should be set in MSR_IA32_MISC_ENABLE register per section 14.3.2.1 of the SDM Vol 3 document 325384-050US Feb 2014. If this bit is set do *not* attempt to disable trubo via the MSR_IA32_PERF_CTL register. On some systems trying to disable turbo via MSR_IA32_PERF_CTL will cause subsequent writes to MSR_IA32_PERF_CTL not take affect, in fact reading MSR_IA32_PERF_CTL will not show the IDA/Turbo DISENGAGE bit(32) as set. A write of bit 32 to zero returns to normal operation. Also deal with the case where the processor does not support turbo and the BIOS does not report the fact in MSR_IA32_MISC_ENABLE but does report the max and turbo P states as the same value. References: https://bugzilla.kernel.org/show_bug.cgi?id=64251 Cc: Stable [3.13+] Signed-off-by: Dirk Brandewie --- drivers/cpufreq/intel_pstate.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index 74376d6..127ead8 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -128,6 +128,7 @@ static struct pstate_funcs pstate_funcs; struct perf_limits { int no_turbo; + int turbo_disabled; int max_perf_pct; int min_perf_pct; int32_t max_perf; @@ -287,7 +288,10 @@ static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, if (ret != 1) return -EINVAL; limits.no_turbo = clamp_t(int, input, 0 , 1); - + if (limits.turbo_disabled) { + pr_warn("Turbo disabled by BIOS or unavailable on processor\n"); + limits.no_turbo = limits.turbo_disabled; + } return count; } @@ -381,7 +385,7 @@ static void byt_set_pstate(struct cpudata *cpudata, int pstate) u32 vid; val = pstate << 8; - if (limits.no_turbo) + if (limits.no_turbo && !limits.turbo_disabled) val |= (u64)1 << 32; vid_fp = cpudata->vid.min + mul_fp( @@ -448,7 +452,7 @@ static void core_set_pstate(struct cpudata *cpudata, int pstate) u64 val; val = pstate << 8; - if (limits.no_turbo) + if (limits.no_turbo && !limits.turbo_disabled) val |= (u64)1 << 32; wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val); @@ -741,7 +745,7 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) limits.min_perf = int_tofp(1); limits.max_perf_pct = 100; limits.max_perf = int_tofp(1); - limits.no_turbo = 0; + limits.no_turbo = limits.turbo_disabled; return 0; } limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; @@ -784,6 +788,7 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy) { struct cpudata *cpu; int rc; + u64 misc_en; rc = intel_pstate_init_cpu(policy->cpu); if (rc) @@ -791,8 +796,13 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy) cpu = all_cpu_data[policy->cpu]; - if (!limits.no_turbo && - limits.min_perf_pct == 100 && limits.max_perf_pct == 100) + rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); + if (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE || + cpu->pstate.max_pstate == cpu->pstate.turbo_pstate) { + limits.turbo_disabled = 1; + limits.no_turbo = 1; + } + if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100) policy->policy = CPUFREQ_POLICY_PERFORMANCE; else policy->policy = CPUFREQ_POLICY_POWERSAVE;