From patchwork Wed Aug 20 20:41:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 4753641 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 265969F4D4 for ; Wed, 20 Aug 2014 20:44:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 52CDC200E6 for ; Wed, 20 Aug 2014 20:44:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7C32820155 for ; Wed, 20 Aug 2014 20:44:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753118AbaHTUmu (ORCPT ); Wed, 20 Aug 2014 16:42:50 -0400 Received: from mail-pd0-f176.google.com ([209.85.192.176]:61832 "EHLO mail-pd0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753076AbaHTUmr (ORCPT ); Wed, 20 Aug 2014 16:42:47 -0400 Received: by mail-pd0-f176.google.com with SMTP id y10so12273672pdj.35 for ; Wed, 20 Aug 2014 13:42:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=9JvAE7bKLCU83bsMC+e/LJjqnLW9+bCEfnO9qgONncU=; b=LYbCo9O7ha1B4raDimxRQdvb8cN/N7w8PRjztUxp0t74Tf7J6aMVmRukMpXZbfjHkK dUWRc6RT13MEzx1gS5mHIXEJmMeDko/j0a8cEfeTyw0RsDx9mHUcZbX873I9BdWMdZky VeRM2jUPs7yGyaRHS/X3IAajGpJ/n4Oqky6uuKUmM/QGVkY8WOnOb6YxYgv0OEWBkWo6 8sWVhxZvCaQ8uuQoRge2URG7iMvvROudBNyMKxKjmp8DETVmqPbDLvIXPPJIfG1u2DrD 4r01LN2fAYVAbKHGNk3FF/w5HEEb6OksX0XTRVOwK3fqz5iodHLGzyrOvas0cY68ixv0 JMQw== X-Received: by 10.70.34.235 with SMTP id c11mr44925124pdj.76.1408567361716; Wed, 20 Aug 2014 13:42:41 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id e2sm35429386pdk.54.2014.08.20.13.42.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 20 Aug 2014 13:42:40 -0700 (PDT) From: Soren Brinkmann To: Michal Simek , Russell King , "Rafael J. Wysocki" , Daniel Lezcano , Rob Herring , Mark Rutland Cc: =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Pawel Moll , Ian Campbell , Kumar Gala Subject: [PATCH 5/9] ARM: zynq: Remove invalidate cache for cpu die Date: Wed, 20 Aug 2014 13:41:51 -0700 Message-Id: <1408567315-28479-6-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 2.0.1.1.gfbfc394 In-Reply-To: <1408567315-28479-1-git-send-email-soren.brinkmann@xilinx.com> References: <1408567315-28479-1-git-send-email-soren.brinkmann@xilinx.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Daniel Lezcano As there is no Power management unit on this board, it is not possible to power down a core, just WFI is allowed. There is no point to invalidate the cache and exit coherency. Signed-off-by: Daniel Lezcano Reviewed-and-tested-by: Soren Brinkmann --- arch/arm/mach-zynq/hotplug.c | 32 +------------------------------- 1 file changed, 1 insertion(+), 31 deletions(-) diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c index 5052c70326e4..366f46c91365 100644 --- a/arch/arm/mach-zynq/hotplug.c +++ b/arch/arm/mach-zynq/hotplug.c @@ -10,35 +10,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include -#include -#include - -#include -#include -#include "common.h" - -static inline void zynq_cpu_enter_lowpower(void) -{ - unsigned int v; - - flush_cache_all(); - asm volatile( - " mcr p15, 0, %1, c7, c5, 0\n" - " dsb\n" - /* - * Turn off coherency - */ - " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, #0x40\n" - " mcr p15, 0, %0, c1, c0, 1\n" - " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 0\n" - : "=&r" (v) - : "r" (0), "Ir" (CR_C) - : "cc"); -} +#include /* * platform-specific code to shutdown a CPU @@ -47,8 +19,6 @@ static inline void zynq_cpu_enter_lowpower(void) */ void zynq_platform_cpu_die(unsigned int cpu) { - zynq_cpu_enter_lowpower(); - /* * there is no power-control hardware on this platform, so all * we can do is put the core into WFI; this is safe as the calling