From patchwork Wed Nov 26 00:51:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 5383061 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 034839F2F5 for ; Wed, 26 Nov 2014 00:51:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 02D4A201C0 for ; Wed, 26 Nov 2014 00:51:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 90E0E20121 for ; Wed, 26 Nov 2014 00:51:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751921AbaKZAvR (ORCPT ); Tue, 25 Nov 2014 19:51:17 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:13428 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751556AbaKZAvQ (ORCPT ); Tue, 25 Nov 2014 19:51:16 -0500 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NFM0061VFPEFF60@mailout3.samsung.com>; Wed, 26 Nov 2014 09:51:14 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 19.C1.11124.20425745; Wed, 26 Nov 2014 09:51:14 +0900 (KST) X-AuditID: cbfee68e-f79b46d000002b74-e0-547524029bc1 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 70.35.09430.10425745; Wed, 26 Nov 2014 09:51:14 +0900 (KST) Received: from abhilash-ubuntu.sisodomain.com ([107.108.73.92]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NFM00LEPFOXBHG0@mmp1.samsung.com>; Wed, 26 Nov 2014 09:51:13 +0900 (KST) From: Abhilash Kesavan To: rui.zhang@intel.com, edubezval@gmail.com, linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com, amit.daniel@samsung.com, kesavan.abhilash@gmail.com, l.majewski@samsung.com, cw00.choi@samsung.com Subject: [PATCH v2] thermal: exynos: add special clock support Date: Wed, 26 Nov 2014 06:21:10 +0530 Message-id: <1416963070-5806-1-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 1.7.9.5 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrKLMWRmVeSWpSXmKPExsWyRsSkSpdJpTTE4OQJPouGqyEWG2esZ7W4 /uU5q8X8K9dYLdb8VbJ483Azo8XlXXPYLD73HmG0ePKwj82B02PnrLvsHov3vGTy6NuyitHj 8ya5AJYoLpuU1JzMstQifbsEroy1944xFlxSrzg47ydjA+N8hS5GTg4JAROJd6/3sEDYYhIX 7q1n62Lk4hASWMoocX/ZYyaYot6ThxghEosYJb6t+M8M4fQxSUzt/MMGUsUmoCex4N9XZhBb RMBNYvGif+wgRcwgHc1bvrGDJIQF7CSunDgJNIqDg0VAVWL1OR2QMK+Ai8SD3gdsIGEJAQWJ OZNsIBa3s0u8O+YLYrMICEh8m3yIBaJEVmLTAWaIEkmJgytusExgFFzAyLCKUTS1ILmgOCm9 yEivODG3uDQvXS85P3cTIzB0T/971reD8eYB60OMAhyMSjy8EVKlIUKsiWXFlbmHGE2BNkxk lhJNzgdGSF5JvKGxmZGFqYmpsZG5pZmSOG+C1M9gIYH0xJLU7NTUgtSi+KLSnNTiQ4xMHJxS DYz9udPKFscs2hJeobNsikpwULNs6OJ7p3VFRc3ubdrgGiJeI+X/fpn+rBdhdU+kNPQN03f4 L3G0lIhsSe1c/3Bn/8pT2hPNY56/9jL+4mqpyn7pscgGm1kPk6NL9v1RdI/U0dd+6T+5w95x VsLT2+ryzqrLT0b+fpTzffnkWxfZu6RTTRoyNZVYijMSDbWYi4oTAYDPnDtYAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t9jAV0mldIQg4aLLBYNV0MsNs5Yz2px /ctzVov5V66xWqz5q2Tx5uFmRovLu+awWXzuPcJo8eRhH5sDp8fOWXfZPRbvecnk0bdlFaPH 501yASxRDYw2GamJKalFCql5yfkpmXnptkrewfHO8aZmBoa6hpYW5koKeYm5qbZKLj4Bum6Z OUCnKCmUJeaUAoUCEouLlfTtME0IDXHTtYBpjND1DQmC6zEyQAMJaxgz1t47xlhwSb3i4Lyf jA2M8xW6GDk5JARMJHpPHmKEsMUkLtxbz9bFyMUhJLCIUeLbiv/MEE4fk8TUzj9sIFVsAnoS C/59ZQaxRQTcJBYv+scOUsQM0tG85Rs7SEJYwE7iyomTQGM5OFgEVCVWn9MBCfMKuEg86H3A BhKWEFCQmDPJZgIj9wJGhlWMoqkFyQXFSem5RnrFibnFpXnpesn5uZsYwbHxTHoH46oGi0OM AhyMSjy8EVKlIUKsiWXFlbmHGCU4mJVEeCUYgEK8KYmVValF+fFFpTmpxYcYTYF2T2SWEk3O B8ZtXkm8obGJuamxqaWJhYmZpZI4742buSFCAumJJanZqakFqUUwfUwcnFINjFNVL7hlK73U S2Odf3qXzEP52AQfs9Pv3nE1bjl9xGuq2S7dOY+lsya/0TPbftvDyPmoyqbZfoXfbizpVLzk cXiFvNGZjrzLh/9evJUwY+mqfpGNVvtXCk/6WaO3PWHZb/ENrtfeJP54V+7C4CtrVPjlk7jb SedP8wqfXX9rnyQ13V/lasza2+lKLMUZiYZazEXFiQCJS/MdowIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos7 has a special clock required for the functional operation of the TMU that is not present in earlier SoCs. Add support for this clock and update the binding documentation. Signed-off-by: Abhilash Kesavan --- Changes since v1: - Added a per-soc flag to indicate the presence of special clock - Changed the name of special clock from "tmu_sclk" to "sclk" - Fixed the error handling for sclk Tested on 5420 and 5800 based chromebooks, no change in existing behavior. .../devicetree/bindings/thermal/exynos-thermal.txt | 3 ++ drivers/thermal/samsung/exynos_tmu.c | 31 ++++++++++++++++---- 2 files changed, 29 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index ae738f5..acf4705 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -32,10 +32,13 @@ - clocks : The main clocks for TMU device -- 1. operational clock for TMU channel -- 2. optional clock to access the shared registers of TMU channel + -- 3. optional special clock for functional operation - clock-names : Thermal system clock name -- "tmu_apbif" operational clock for current TMU channel -- "tmu_triminfo_apbif" clock to access the shared triminfo register for current TMU channel + -- "sclk" clock for functional operation of the current TMU + channel - vtmu-supply: This entry is optional and provides the regulator node supplying voltage to TMU. If needed this entry can be placed inside board/platform specific dts file. diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index d44d91d..8ed8409 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -123,11 +123,14 @@ * @base: base address of the single instance of the TMU controller. * @base_second: base address of the common registers of the TMU controller. * @irq: irq number of the TMU controller. + * @needs_sclk: SoC specific flag indicating that sclk is required for + functional operation of the TMU controller. * @soc: id of the SOC type. * @irq_work: pointer to the irq work structure. * @lock: lock to implement synchronization. * @clk: pointer to the clock structure. * @clk_sec: pointer to the clock structure for accessing the base_second. + * @sclk: pointer to the clock structure for accessing the tmu special clock. * @temp_error1: fused value of the first point trim. * @temp_error2: fused value of the second point trim. * @regulator: pointer to the TMU regulator structure. @@ -144,10 +147,11 @@ struct exynos_tmu_data { void __iomem *base; void __iomem *base_second; int irq; + bool needs_sclk; enum soc_type soc; struct work_struct irq_work; struct mutex lock; - struct clk *clk, *clk_sec; + struct clk *clk, *clk_sec, *sclk; u8 temp_error1, temp_error2; struct regulator *regulator; struct thermal_sensor_conf *reg_conf; @@ -883,10 +887,24 @@ static int exynos_tmu_probe(struct platform_device *pdev) goto err_clk_sec; } + if (data->needs_sclk) { + data->sclk = devm_clk_get(&pdev->dev, "sclk"); + if (IS_ERR(data->sclk)) { + dev_err(&pdev->dev, "Failed to get sclk\n"); + goto err_clk; + } else { + ret = clk_prepare_enable(data->sclk); + if (ret) { + dev_err(&pdev->dev, "Failed to enable sclk\n"); + goto err_clk; + } + } + } + ret = exynos_tmu_initialize(pdev); if (ret) { dev_err(&pdev->dev, "Failed to initialize TMU\n"); - goto err_clk; + goto err_sclk; } exynos_tmu_control(pdev, true); @@ -896,7 +914,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) sizeof(struct thermal_sensor_conf), GFP_KERNEL); if (!sensor_conf) { ret = -ENOMEM; - goto err_clk; + goto err_sclk; } sprintf(sensor_conf->name, "therm_zone%d", data->id); sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read; @@ -928,7 +946,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) ret = exynos_register_thermal(sensor_conf); if (ret) { dev_err(&pdev->dev, "Failed to register thermal interface\n"); - goto err_clk; + goto err_sclk; } data->reg_conf = sensor_conf; @@ -936,10 +954,12 @@ static int exynos_tmu_probe(struct platform_device *pdev) IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data); if (ret) { dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq); - goto err_clk; + goto err_sclk; } return 0; +err_sclk: + clk_disable_unprepare(data->sclk); err_clk: clk_unprepare(data->clk); err_clk_sec: @@ -956,6 +976,7 @@ static int exynos_tmu_remove(struct platform_device *pdev) exynos_tmu_control(pdev, false); + clk_disable_unprepare(data->sclk); clk_unprepare(data->clk); if (!IS_ERR(data->clk_sec)) clk_unprepare(data->clk_sec);