| Message ID | 1420511727-8242-11-git-send-email-wens@csie.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 4fe0bd192e29..dd93d227865e 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -24,10 +24,26 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; + clocks = <&cpu>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1104000 1500000 + 1008000 1400000 + 912000 1350000 + 864000 1300000 + 624000 1200000 + 576000 1200000 + 432000 1200000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <6>; }; };
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A13 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/boot/dts/sun5i-a13.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)