From patchwork Wed Mar 4 14:21:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Belloni X-Patchwork-Id: 5936411 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CD9BBBF440 for ; Wed, 4 Mar 2015 14:22:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F4099202BE for ; Wed, 4 Mar 2015 14:22:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0160120253 for ; Wed, 4 Mar 2015 14:22:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758625AbbCDOVw (ORCPT ); Wed, 4 Mar 2015 09:21:52 -0500 Received: from down.free-electrons.com ([37.187.137.238]:47211 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758649AbbCDOVu (ORCPT ); Wed, 4 Mar 2015 09:21:50 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id D4EE33B3; Wed, 4 Mar 2015 15:21:50 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (128-79-216-6.hfc.dyn.abo.bbox.fr [128.79.216.6]) by mail.free-electrons.com (Postfix) with ESMTPSA id 9C97738E; Wed, 4 Mar 2015 15:21:50 +0100 (CET) From: Alexandre Belloni To: Nicolas Ferre , Daniel Lezcano Cc: Boris Brezillon , Jean-Christophe Plagniol-Villard , Thomas Gleixner , Lee Jones , Wim Van Sebroeck , Guenter Roeck , Sebastian Reichel , Dmitry Eremin-Solenikov , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-pm@vger.kernel.org, Alexandre Belloni Subject: [PATCH v3 9/9] ARM: at91: remove useless include Date: Wed, 4 Mar 2015 15:21:37 +0100 Message-Id: <1425478897-27322-10-git-send-email-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1425478897-27322-1-git-send-email-alexandre.belloni@free-electrons.com> References: <1425478897-27322-1-git-send-email-alexandre.belloni@free-electrons.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Both drivers using the system timer are now converted to an MFD. mach/at91_st.h is now useless. Signed-off-by: Alexandre Belloni Acked-by: Boris Brezillon --- arch/arm/mach-at91/include/mach/at91_st.h | 61 ------------------------------- 1 file changed, 61 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/at91_st.h diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h deleted file mode 100644 index 67fdbd13c3ed..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_st.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_st.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * System Timer (ST) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_ST_H -#define AT91_ST_H - -#ifndef __ASSEMBLY__ -extern void __iomem *at91_st_base; - -#define at91_st_read(field) \ - __raw_readl(at91_st_base + field) - -#define at91_st_write(field, value) \ - __raw_writel(value, at91_st_base + field) -#else -.extern at91_st_base -#endif - -#define AT91_ST_CR 0x00 /* Control Register */ -#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ - -#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */ -#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ - -#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */ -#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ -#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ -#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ - -#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */ -#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ - -#define AT91_ST_SR 0x10 /* Status Register */ -#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ -#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ -#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ -#define AT91_ST_ALMS (1 << 3) /* Alarm Status */ - -#define AT91_ST_IER 0x14 /* Interrupt Enable Register */ -#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */ -#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */ - -#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */ -#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ - -#define AT91_ST_CRTR 0x24 /* Current Real-time Register */ -#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ - -#endif