@@ -61,6 +61,9 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
+ clocks = <&cpuclk 0>;
+ clock-latency = <1000000>;
+ clock-names = "cpu0";
};
};
@@ -61,11 +61,17 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
+ clocks = <&cpuclk 0>;
+ clock-latency = <1000000>;
+ clock-names = "cpu0";
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
+ clocks = <&cpuclk 0>;
+ clock-latency = <1000000>;
+ clock-names = "cpu1";
};
};
@@ -369,6 +369,15 @@
#clock-cells = <1>;
};
+ cpuclk: clock-complex@18700 {
+ compatible = "marvell,armada-380-cpu-clock",
+ "marvell,armada-xp-cpu-clock";
+ reg = <0x18700 0xA0>, <0x1c054 0x40>,
+ <0xe4260 0x8>;
+ clocks = <&coreclk 1>;
+ #clock-cells = <1>;
+ };
+
mbusc: mbus-controller@20000 {
compatible = "marvell,mbus-controller";
reg = <0x20000 0x100>, <0x20180 0x20>;
In order to support dynamic frequency scaling: - the cpuclk Device Tree node must be added - the clock property of the CPUs must be filled including the clock-latency property. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> --- arch/arm/boot/dts/armada-380.dtsi | 3 +++ arch/arm/boot/dts/armada-385.dtsi | 6 ++++++ arch/arm/boot/dts/armada-38x.dtsi | 9 +++++++++ 3 files changed, 18 insertions(+)