From patchwork Thu Sep 10 13:55:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 7154371 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7415BBEEC1 for ; Thu, 10 Sep 2015 13:55:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7F8A72092E for ; Thu, 10 Sep 2015 13:55:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6BC2C2086B for ; Thu, 10 Sep 2015 13:55:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753226AbbIJNza (ORCPT ); Thu, 10 Sep 2015 09:55:30 -0400 Received: from mail-pa0-f53.google.com ([209.85.220.53]:35407 "EHLO mail-pa0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752067AbbIJNz3 (ORCPT ); Thu, 10 Sep 2015 09:55:29 -0400 Received: by pacfv12 with SMTP id fv12so44853938pac.2; Thu, 10 Sep 2015 06:55:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=+BCmhC4oBKsmJsT3QF2XW8OSFBt5tKDB3b3MTzRlU3Y=; b=VB3hO/GCuI8Ra2rlHsvDx44UCHg5m5U6ABfoKmFfjZsCM4471ruTHNn5CVzpEJ9JvI KQotcQ1NKhKwA2iHF3YoTCzmNIEACL6lIEXBKGUukXXSIbV3r7TC0hcKZW0kpUQgLJXt UKCNspPmBec8vQ2wBP1rIkY6bd0uvWALqOvYchjIgRkc2zaNivY2HS3A+X0HHsCUyIaW VHJrGVO68QDfMQJn0Seehv2mreJIj0rU5YEIcBFz/I2ZFWZd45X7ajWYpSyfpm5E88XV UpmS3ufUAH9BMf/fnjMgfVaRlcI8Q84JuHgnqzR3IQt0oA/ATLqSE/qxPMc/Ipeh/3qn SlPw== X-Received: by 10.68.69.98 with SMTP id d2mr82266324pbu.137.1441893328418; Thu, 10 Sep 2015 06:55:28 -0700 (PDT) Received: from localhost (port-54762.pppoe.wtnet.de. [46.59.214.153]) by smtp.gmail.com with ESMTPSA id bh5sm12292869pbc.5.2015.09.10.06.55.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Sep 2015 06:55:27 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Alexandre Courbot , Stephen Warren , Mikko Perttunen , Tuomas Tynkkynen , Viresh Kumar , Stephen Boyd , Krzysztof Kozlowski , "Rafael J. Wysocki" , linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH] clk: tegra: dfll: Properly protect OPP list Date: Thu, 10 Sep 2015 15:55:21 +0200 Message-Id: <1441893321-4563-1-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.5.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding The OPP list needs to be protected against concurrent accesses. Using simple RCU read locks does the trick and gets rid of the following lockdep warning: [ 9.095873] =============================== [ 9.100050] [ INFO: suspicious RCU usage. ] [ 9.104313] 4.2.0-next-20150908 #1 Not tainted [ 9.111187] ------------------------------- [ 9.115428] drivers/base/power/opp.c:460 Missing rcu_read_lock() or dev_opp_list_lock protection! [ 9.128519] [ 9.128519] other info that might help us debug this: [ 9.128519] [ 9.136651] [ 9.136651] rcu_scheduler_active = 1, debug_locks = 0 [ 9.143222] 4 locks held by kworker/u8:0/6: [ 9.147409] #0: ("%s""deferwq"){++++.+}, at: [] process_one_work+0x118/0x4bc [ 9.155610] #1: (deferred_probe_work){+.+.+.}, at: [] process_one_work+0x118/0x4bc [ 9.164335] #2: (&dev->mutex){......}, at: [] __device_attach+0x20/0x118 [ 9.172134] #3: (prepare_lock){+.+...}, at: [] clk_prepare_lock+0x10/0xf8 [ 9.180365] [ 9.180365] stack backtrace: [ 9.184764] CPU: 2 PID: 6 Comm: kworker/u8:0 Not tainted 4.2.0-next-20150908 #1 [ 9.194536] Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) [ 9.200809] Workqueue: deferwq deferred_probe_work_func [ 9.206115] [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [ 9.213918] [] (show_stack) from [] (dump_stack+0x94/0xd4) [ 9.221142] [] (dump_stack) from [] (dev_pm_opp_find_freq_ceil+0x108/0x114) [ 9.229903] [] (dev_pm_opp_find_freq_ceil) from [] (dfll_calculate_rate_request+0xb8/0x170) [ 9.240041] [] (dfll_calculate_rate_request) from [] (dfll_clk_round_rate+0x1c/0x2c) [ 9.249560] [] (dfll_clk_round_rate) from [] (clk_calc_new_rates+0x1b8/0x228) [ 9.258473] [] (clk_calc_new_rates) from [] (clk_core_set_rate_nolock+0x44/0xac) [ 9.267647] [] (clk_core_set_rate_nolock) from [] (clk_set_rate+0x24/0x34) [ 9.276306] [] (clk_set_rate) from [] (tegra124_cpufreq_probe+0x120/0x230) [ 9.284944] [] (tegra124_cpufreq_probe) from [] (platform_drv_probe+0x44/0xac) [ 9.293948] [] (platform_drv_probe) from [] (driver_probe_device+0x218/0x304) [ 9.302816] [] (driver_probe_device) from [] (bus_for_each_drv+0x60/0x94) [ 9.311397] [] (bus_for_each_drv) from [] (__device_attach+0xb4/0x118) [ 9.313229] ata1: SATA link down (SStatus 0 SControl 300) [ 9.325137] [] (__device_attach) from [] (bus_probe_device+0x88/0x90) [ 9.333360] [] (bus_probe_device) from [] (deferred_probe_work_func+0x58/0x8c) [ 9.342338] [] (deferred_probe_work_func) from [] (process_one_work+0x188/0x4bc) [ 9.351526] [] (process_one_work) from [] (worker_thread+0x4c/0x4f4) [ 9.359690] [] (worker_thread) from [] (kthread+0xe4/0xf8) [ 9.366970] [] (kthread) from [] (ret_from_fork+0x14/0x24) Signed-off-by: Thierry Reding --- drivers/clk/tegra/clk-dfll.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c index aa026bcf5b00..8e25bd52da8c 100644 --- a/drivers/clk/tegra/clk-dfll.c +++ b/drivers/clk/tegra/clk-dfll.c @@ -632,11 +632,15 @@ static int find_lut_index_for_rate(struct tegra_dfll *td, unsigned long rate) struct dev_pm_opp *opp; int i, uv; + rcu_read_lock(); + opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); if (IS_ERR(opp)) return PTR_ERR(opp); uv = dev_pm_opp_get_voltage(opp); + rcu_read_unlock(); + for (i = 0; i < td->i2c_lut_size; i++) { if (regulator_list_voltage(td->vdd_reg, td->i2c_lut[i]) == uv) return i; @@ -1450,6 +1454,8 @@ static int dfll_build_i2c_lut(struct tegra_dfll *td) td->i2c_lut[0] = lut; for (j = 1, rate = 0; ; rate++) { + rcu_read_lock(); + opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); if (IS_ERR(opp)) break; @@ -1458,6 +1464,8 @@ static int dfll_build_i2c_lut(struct tegra_dfll *td) if (v_opp <= td->soc->min_millivolts * 1000) td->dvco_rate_min = dev_pm_opp_get_freq(opp); + rcu_read_unlock(); + for (;;) { v += max(1, (v_max - v) / (MAX_DFLL_VOLTAGES - j)); if (v >= v_opp)