From patchwork Thu Dec 3 08:48:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7757431 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 651B29F30B for ; Thu, 3 Dec 2015 08:54:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E523E20549 for ; Thu, 3 Dec 2015 08:54:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E8C7E2041C for ; Thu, 3 Dec 2015 08:54:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758995AbbLCIyW (ORCPT ); Thu, 3 Dec 2015 03:54:22 -0500 Received: from mail-pa0-f54.google.com ([209.85.220.54]:36446 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758855AbbLCIyW (ORCPT ); Thu, 3 Dec 2015 03:54:22 -0500 Received: by pacdm15 with SMTP id dm15so65050591pac.3; Thu, 03 Dec 2015 00:54:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GctbipAxIL+XQqe2ZcPYps81l9czTjiOyv9L9qNhrjQ=; b=Cg9FCEUe3rGmtKYozNUVZSoTfZRq8Ad8/DpYS2hlA2mRZwpdnQlmX/o8emZOHsW+tZ aibV5np2mWZLjDHXt3zuiSaV2cvWzHf2ZS0X04QNwsYQRvqDv4Bzh1lypRBe9hLMFxNG 1TOBbCkzxe/iXO06dzkiuJkbOeOTNxBnNV71qrWxoFt8l6731NB1cvKdva4+sf6KROLJ UqDeY3mT01AuHdgsAZ0drvoIcrb6CODqL2iZq9PdLgPYQQ/ztNVEE2MeStw/Fv2OQKmL kD9irJt3Cko7qWEFK/y4OVqFQKZYm1QXI/AFls9Z3SVdqLNKxSHwK1R80MHe9EVLnMmC Zx5A== X-Received: by 10.66.122.7 with SMTP id lo7mr11303033pab.98.1449132547915; Thu, 03 Dec 2015 00:49:07 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id 13sm9087741pfp.68.2015.12.03.00.48.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Dec 2015 00:49:06 -0800 (PST) From: Caesar Wang To: Eduardo Valentin Cc: huangtao@rock-chips.com, Heiko Stuebner , dmitry.torokhov@gmail.com, dianders@chromium.org, linux-rockchip@lists.infradead.org, computersforpeace@gmail.com, Dan Carpenter , Caesar Wang , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Jiri Kosina , Zhang Rui , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/5] thermal: rockchip: fix a trivial typo Date: Thu, 3 Dec 2015 16:48:39 +0800 Message-Id: <1449132523-18817-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1449132523-18817-1-git-send-email-wxt@rock-chips.com> References: <1449132523-18817-1-git-send-email-wxt@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patchset trys to dictate unified format for driver. Signed-off-by: Caesar Wang --- Changes in v3: None Changes in v2: - As Heiko comments, move to documenting the fields in the header instead of inside the table. Changes in v1: - Search more trivial typo for me. drivers/thermal/rockchip_thermal.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index e845841..ae796ec 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -38,7 +38,7 @@ enum tshut_mode { }; /** - * the system Temperature Sensors tshut(tshut) polarity + * The system Temperature Sensors tshut(tshut) polarity * the bit 8 is tshut polarity. * 0: low active, 1: high active */ @@ -57,10 +57,10 @@ enum sensor_id { }; /** -* The conversion table has the adc value and temperature. -* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table) -* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table) -*/ + * The conversion table has the adc value and temperature. + * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table) + * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table) + */ enum adc_sort_mode { ADC_DECREMENT = 0, ADC_INCREMENT, @@ -72,16 +72,17 @@ enum adc_sort_mode { */ #define SOC_MAX_SENSORS 2 +/** + * struct chip_tsadc_table: hold information about chip-specific differences + * @id: conversion table + * @length: size of conversion table + * @data_mask: mask to apply on data inputs + * @mode: sort mode of this adc variant (incrementing or decrementing) + */ struct chip_tsadc_table { const struct tsadc_table *id; - - /* the array table size*/ unsigned int length; - - /* that analogic mask data */ u32 data_mask; - - /* the sort mode is adc value that increment or decrement in table */ enum adc_sort_mode mode; }; @@ -617,7 +618,7 @@ rockchip_thermal_register_sensor(struct platform_device *pdev, return 0; } -/* +/** * Reset TSADC Controller, reset all tsadc registers. */ static void rockchip_thermal_reset_controller(struct reset_control *reset)