From patchwork Mon Feb 15 07:33:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 8310591 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 98456C02AA for ; Mon, 15 Feb 2016 07:35:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AEB2520270 for ; Mon, 15 Feb 2016 07:35:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AF8EB201F5 for ; Mon, 15 Feb 2016 07:35:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752447AbcBOHe4 (ORCPT ); Mon, 15 Feb 2016 02:34:56 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:35977 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752413AbcBOHev (ORCPT ); Mon, 15 Feb 2016 02:34:51 -0500 Received: by mail-pf0-f193.google.com with SMTP id e127so7166311pfe.3; Sun, 14 Feb 2016 23:34:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d9kmXvka2y8TAp47k1fQoR+KSon721yzitt19SKh2iI=; b=PgGR/6agmSISWBg2iPj45a+TzD50lavaEa+eXTDiZeFvmjouCk1kjUDKcflcV3lTn0 +LcrDyhrr3aUh7XFgndRsoaSZbCub/M6NFIMtgPR1iX2tQbnftCyypgzfJQnuzhRtq/9 DkvLd4zdBBQ3u9Q9DVJBIWwx4qwz0OzKbGcRgydPZnYQczezjrFZtt2GbG0+fQSasih6 yvrKLhsD70co2KuiVgMKX6o1vp9zhjrzQf5okb8nsvYj3eWO6xoxSvGbiaBzU4A17M4s 7IHbzRlcJ+lwdu5jH2r2IeUHU5hXvGXqlcnMeVrQhrkGKkQEiibzedY+FefUTe2EACiv L6Nw== X-Gm-Message-State: AG10YOQvuzxXxRjSfXDO8RDTDyImhkK0DZk9XMaL81jxm8Ha+z8vbLTdH8tFBGpOa4MoDg== X-Received: by 10.98.42.20 with SMTP id q20mr21870977pfq.146.1455521691192; Sun, 14 Feb 2016 23:34:51 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id o17sm36040286pfj.50.2016.02.14.23.34.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 14 Feb 2016 23:34:50 -0800 (PST) From: Caesar Wang To: Heiko Stuebner , edubezval@gmail.com Cc: huangtao@rock-chips.com, Michael Turquette , linux-pm@vger.kernel.org, Stephen Boyd , zhangqing@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Dmitry Torokhov , Jeffy Chen , Zhang Rui , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Caesar Wang Subject: [RESEND PATCH 7/8] ARM: dts: rockchip: add the thermal main info found on rk3228 Date: Mon, 15 Feb 2016 15:33:32 +0800 Message-Id: <1455521613-27340-8-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455521613-27340-1-git-send-email-wxt@rock-chips.com> References: <1455521613-27340-1-git-send-email-wxt@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the thermal needed main information for rk3228 SoCS. Basically has the following content: 1) TSADC controller: Add the needed attributes for rk3036 TSADC controller. Especially for the TSHUT, in some cases if we are unable to shut it down in orderly fashion (says: kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature is over 95C over a period of time the thermal shutdown of the tsadc is invoked with can either reset the entire chip via the CRU, or notify the PMIC via a GPIO. This should be set in the specific board. 2) Thermal zones: Add the needed device mode for thermal generic framework. Detail in Documentation/devicetree/bindings/thermal/thermal.txt. Signed-off-by: Caesar Wang --- arch/arm/boot/dts/rk3228.dtsi | 69 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi index 119ff12..4084081 100644 --- a/arch/arm/boot/dts/rk3228.dtsi +++ b/arch/arm/boot/dts/rk3228.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -69,6 +70,7 @@ /* KHz uV */ 816000 1000000 >; + #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; }; @@ -247,6 +249,63 @@ assigned-clock-rates = <594000000>; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&tsadc 0>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_alert1: cpu_alert1 { + temperature = <75000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT 6>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + tsadc: tsadc@11150000 { + compatible = "rockchip,rk3228-tsadc"; + reg = <0x11150000 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; + #thermal-sensor-cells = <0>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; + emmc: dwmmc@30020000 { compatible = "rockchip,rk3288-dw-mshc"; reg = <0x30020000 0x4000>; @@ -394,6 +453,16 @@ }; }; + tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otp_out: otp-out { + rockchip,pins = <0 24 RK_FUNC_2 &pcfg_pull_none>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,