@@ -32,6 +32,9 @@
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
+ cooling-min-level = <0>;
+ cooling-max-level = <11>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu1: cpu@101 {
@@ -69,6 +72,9 @@
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
+ cooling-min-level = <0>;
+ cooling-max-level = <15>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu5: cpu@1 {
On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE and 18 steps for big core (200-1700 MHz). Add respective cooling cells. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- arch/arm/boot/dts/exynos5422-cpus.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)