From patchwork Thu Jun 2 12:39:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shreyas B. Prabhu" X-Patchwork-Id: 9149911 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 87CF660751 for ; Thu, 2 Jun 2016 12:40:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 780A828236 for ; Thu, 2 Jun 2016 12:40:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6C07A282E8; Thu, 2 Jun 2016 12:40:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B5D8128236 for ; Thu, 2 Jun 2016 12:39:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161019AbcFBMjb (ORCPT ); Thu, 2 Jun 2016 08:39:31 -0400 Received: from e36.co.us.ibm.com ([32.97.110.154]:52037 "EHLO e36.co.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753458AbcFBMj3 (ORCPT ); Thu, 2 Jun 2016 08:39:29 -0400 Received: from localhost by e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 2 Jun 2016 06:39:23 -0600 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: shreyas@linux.vnet.ibm.com X-IBM-RcptTo: Lorenzo.Pieralisi@arm.com; mpe@ellerman.id.au; rafael.j.wysocki@intel.com; robh+dt@kernel.org; daniel.lezcano@linaro.org; linuxppc-dev@lists.ozlabs.org; mikey@neuling.org; paulus@ozlabs.org; linux-kernel@vger.kernel.org; linux-pm@vger.kernel.org Received: from b01cxnp22035.gho.pok.ibm.com (b01cxnp22035.gho.pok.ibm.com [9.57.198.25]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id 3D9D73E4003E; Thu, 2 Jun 2016 06:39:23 -0600 (MDT) Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u52CdMk939125018; Thu, 2 Jun 2016 12:39:22 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BFDE911204B; Thu, 2 Jun 2016 08:39:22 -0400 (EDT) Received: from ltchab1.austin.ibm.com (unknown [9.40.193.138]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP id C6DCF112040; Thu, 2 Jun 2016 08:39:21 -0400 (EDT) From: "Shreyas B. Prabhu" To: mpe@ellerman.id.au Cc: paulus@ozlabs.org, mikey@neuling.org, ego@linux.vnet.ibm.com, maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, "Shreyas B. Prabhu" , "Rafael J. Wysocki" , Daniel Lezcano , Rob Herring , Lorenzo Pieralisi , linux-pm@vger.kernel.org Subject: [PATCH v5 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states Date: Thu, 2 Jun 2016 07:39:00 -0500 Message-Id: <1464871141-11568-11-git-send-email-shreyas@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1464871141-11568-1-git-send-email-shreyas@linux.vnet.ibm.com> References: <1464871141-11568-1-git-send-email-shreyas@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060212-0021-0000-0000-0000526952FD X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. b) new per thread SPR named PSSCR is added which controls the behavior of stop instruction. Supported idle states and value to be written to PSSCR register to enter any idle state is exposed via ibm,cpu-idle-state-names and ibm,cpu-idle-state-psscr respectively. To enter an idle state, platform provided power_stop() needs to be invoked with the appropriate PSSCR value. This patch adds support for this new mechanism in cpuidle powernv driver. Cc: Rafael J. Wysocki Cc: Daniel Lezcano Cc: Rob Herring Cc: Lorenzo Pieralisi Cc: linux-pm@vger.kernel.org Cc: Michael Ellerman Cc: Paul Mackerras Cc: linuxppc-dev@lists.ozlabs.org Reviewed-by: Gautham R. Shenoy Signed-off-by: Shreyas B. Prabhu --- Note: Documentation for the device tree bindings is posted here- http://patchwork.ozlabs.org/patch/629125/ Changes in v5 ============= - Use generic cpuidle constant CPUIDLE_NAME_LEN - Fix return code handling for of_property_read_string_array - Use DT flags to determine if are using stop instruction, instead of cpu_has_feature - Removed uncessary cast with names - &stop_loop -> stop_loop - Added POWERNV_THRESHOLD_LATENCY_NS to filter out idle states with high latency drivers/cpuidle/cpuidle-powernv.c | 71 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 70 insertions(+), 1 deletion(-) diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c index 3a763a8..0717dc6 100644 --- a/drivers/cpuidle/cpuidle-powernv.c +++ b/drivers/cpuidle/cpuidle-powernv.c @@ -20,6 +20,8 @@ #include #include +#define POWERNV_THRESHOLD_LATENCY_NS 200000 + struct cpuidle_driver powernv_idle_driver = { .name = "powernv_idle", .owner = THIS_MODULE, @@ -27,6 +29,9 @@ struct cpuidle_driver powernv_idle_driver = { static int max_idle_state; static struct cpuidle_state *cpuidle_state_table; + +static u64 stop_psscr_table[CPUIDLE_STATE_MAX]; + static u64 snooze_timeout; static bool snooze_timeout_en; @@ -91,6 +96,17 @@ static int fastsleep_loop(struct cpuidle_device *dev, return index; } #endif + +static int stop_loop(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + ppc64_runlatch_off(); + power_stop(stop_psscr_table[index]); + ppc64_runlatch_on(); + return index; +} + /* * States for dedicated partition case. */ @@ -167,6 +183,8 @@ static int powernv_add_idle_states(void) int nr_idle_states = 1; /* Snooze */ int dt_idle_states; u32 *latency_ns, *residency_ns, *flags; + u64 *psscr_val = NULL; + const char *names[CPUIDLE_STATE_MAX]; int i, rc; /* Currently we have snooze statically defined */ @@ -199,12 +217,41 @@ static int powernv_add_idle_states(void) goto out_free_latency; } + rc = of_property_read_string_array(power_mgt, + "ibm,cpu-idle-state-names", names, + dt_idle_states); + if (rc < 0) { + pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n"); + goto out_free_latency; + } + + /* + * If the idle states use stop instruction, probe for psscr values + * which are necessary to specify required stop level. + */ + if (flags[0] & (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP)) { + psscr_val = kcalloc(dt_idle_states, sizeof(*psscr_val), + GFP_KERNEL); + rc = of_property_read_u64_array(power_mgt, + "ibm,cpu-idle-state-psscr", + psscr_val, dt_idle_states); + if (rc) { + pr_warn("cpuidle-powernv: missing ibm,cpu-idle-states-psscr in DT\n"); + goto out_free_psscr; + } + } residency_ns = kzalloc(sizeof(*residency_ns) * dt_idle_states, GFP_KERNEL); rc = of_property_read_u32_array(power_mgt, "ibm,cpu-idle-state-residency-ns", residency_ns, dt_idle_states); for (i = 0; i < dt_idle_states; i++) { - + /* + * If an idle state has exit latency beyond + * POWERNV_THRESHOLD_LATENCY_NS then don't use it + * in cpu-idle. + */ + if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS) + continue; /* * Cpuidle accepts exit_latency and target_residency in us. * Use default target_residency values if f/w does not expose it. @@ -216,6 +263,16 @@ static int powernv_add_idle_states(void) powernv_states[nr_idle_states].flags = 0; powernv_states[nr_idle_states].target_residency = 100; powernv_states[nr_idle_states].enter = &nap_loop; + } else if ((flags[i] & OPAL_PM_STOP_INST_FAST) && + !(flags[i] & OPAL_PM_TIMEBASE_STOP)) { + strncpy(powernv_states[nr_idle_states].name, + names[i], CPUIDLE_NAME_LEN); + strncpy(powernv_states[nr_idle_states].desc, + names[i], CPUIDLE_NAME_LEN); + powernv_states[nr_idle_states].flags = 0; + + powernv_states[nr_idle_states].enter = stop_loop; + stop_psscr_table[nr_idle_states] = psscr_val[i]; } /* @@ -231,6 +288,16 @@ static int powernv_add_idle_states(void) powernv_states[nr_idle_states].flags = CPUIDLE_FLAG_TIMER_STOP; powernv_states[nr_idle_states].target_residency = 300000; powernv_states[nr_idle_states].enter = &fastsleep_loop; + } else if ((flags[i] & OPAL_PM_STOP_INST_DEEP) && + (flags[i] & OPAL_PM_TIMEBASE_STOP)) { + strncpy(powernv_states[nr_idle_states].name, + names[i], CPUIDLE_NAME_LEN); + strncpy(powernv_states[nr_idle_states].desc, + names[i], CPUIDLE_NAME_LEN); + + powernv_states[nr_idle_states].flags = CPUIDLE_FLAG_TIMER_STOP; + powernv_states[nr_idle_states].enter = stop_loop; + stop_psscr_table[nr_idle_states] = psscr_val[i]; } #endif powernv_states[nr_idle_states].exit_latency = @@ -245,6 +312,8 @@ static int powernv_add_idle_states(void) } kfree(residency_ns); +out_free_psscr: + kfree(psscr_val); out_free_latency: kfree(latency_ns); out_free_flags: