From patchwork Thu Jun 16 16:48:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Pan X-Patchwork-Id: 9181357 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 527BA6075D for ; Thu, 16 Jun 2016 16:51:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4389F2835D for ; Thu, 16 Jun 2016 16:51:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 38A0228365; Thu, 16 Jun 2016 16:51:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC38A28360 for ; Thu, 16 Jun 2016 16:51:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754932AbcFPQvA (ORCPT ); Thu, 16 Jun 2016 12:51:00 -0400 Received: from mga02.intel.com ([134.134.136.20]:12024 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754920AbcFPQu7 (ORCPT ); Thu, 16 Jun 2016 12:50:59 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 16 Jun 2016 09:50:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,481,1459839600"; d="scan'208";a="977177008" Received: from icelake.jf.intel.com ([10.7.199.88]) by orsmga001.jf.intel.com with ESMTP; 16 Jun 2016 09:50:28 -0700 From: Jacob Pan To: Len Brown , LKML , Linux PM , Rafael Wysocki Cc: Jacob Pan Subject: [PATCH 1/3] tools/power/turbostat: handle missing rapl msrs Date: Thu, 16 Jun 2016 09:48:20 -0700 Message-Id: <1466095702-5537-2-git-send-email-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1466095702-5537-1-git-send-email-jacob.jun.pan@linux.intel.com> References: <1466095702-5537-1-git-send-email-jacob.jun.pan@linux.intel.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some CPUs may not have PP0/Core domain power limit MSRs. We should still allow its domain energy status to be used. This patch splits PP0/Core RAPL into two separate flags for power limit and energy status such that energy status can continue to be reported without power limit. Without this patch, turbostat will not be able to use the remaining RAPL features if some PL MSRs are not present. Signed-off-by: Jacob Pan --- tools/power/x86/turbostat/turbostat.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index acbf7ff..26566e6 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -131,9 +131,8 @@ unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */ #define RAPL_DRAM_POWER_INFO (1 << 5) /* 0x61c MSR_DRAM_POWER_INFO */ -#define RAPL_CORES (1 << 6) +#define RAPL_CORES_POWER_LIMIT (1 << 6) /* 0x638 MSR_PP0_POWER_LIMIT */ - /* 0x639 MSR_PP0_ENERGY_STATUS */ #define RAPL_CORE_POLICY (1 << 7) /* 0x63a MSR_PP0_POLICY */ @@ -141,6 +140,10 @@ unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */ /* 0x640 MSR_PP1_POWER_LIMIT */ /* 0x641 MSR_PP1_ENERGY_STATUS */ /* 0x642 MSR_PP1_POLICY */ + +#define RAPL_CORES_ENERGY_STATUS (1 << 9) + /* 0x639 MSR_PP0_ENERGY_STATUS */ +#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT) #define TJMAX_DEFAULT 100 #define MAX(a, b) ((a) > (b) ? (a) : (b)) @@ -400,7 +403,7 @@ void print_header(void) if (do_rapl && !rapl_joules) { if (do_rapl & RAPL_PKG) outp += sprintf(outp, " PkgWatt"); - if (do_rapl & RAPL_CORES) + if (do_rapl & RAPL_CORES_ENERGY_STATUS) outp += sprintf(outp, " CorWatt"); if (do_rapl & RAPL_GFX) outp += sprintf(outp, " GFXWatt"); @@ -413,7 +416,7 @@ void print_header(void) } else if (do_rapl && rapl_joules) { if (do_rapl & RAPL_PKG) outp += sprintf(outp, " Pkg_J"); - if (do_rapl & RAPL_CORES) + if (do_rapl & RAPL_CORES_ENERGY_STATUS) outp += sprintf(outp, " Cor_J"); if (do_rapl & RAPL_GFX) outp += sprintf(outp, " GFX_J"); @@ -670,7 +673,7 @@ int format_counters(struct thread_data *t, struct core_data *c, if (do_rapl && !rapl_joules) { if (do_rapl & RAPL_PKG) outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float); - if (do_rapl & RAPL_CORES) + if (do_rapl & RAPL_CORES_ENERGY_STATUS) outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float); if (do_rapl & RAPL_GFX) outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float); @@ -1237,7 +1240,7 @@ retry: return -13; p->energy_pkg = msr & 0xFFFFFFFF; } - if (do_rapl & RAPL_CORES) { + if (do_rapl & RAPL_CORES_ENERGY_STATUS) { if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr)) return -14; p->energy_cores = msr & 0xFFFFFFFF; @@ -2671,7 +2674,7 @@ void rapl_probe(unsigned int family, unsigned int model) break; case 0x37: /* BYT */ case 0x4D: /* AVN */ - do_rapl = RAPL_PKG | RAPL_CORES ; + do_rapl = RAPL_PKG | RAPL_CORES; break; default: return; @@ -2886,9 +2889,8 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p) fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF); } } - if (do_rapl & RAPL_CORES) { + if (do_rapl & RAPL_CORES_POWER_LIMIT) { if (debug) { - if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr)) return -9; fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",