From patchwork Wed Jan 18 18:48:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: srinivas pandruvada X-Patchwork-Id: 9524571 X-Patchwork-Delegate: rjw@sisk.pl Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A3F766020B for ; Wed, 18 Jan 2017 18:50:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 959C9285B9 for ; Wed, 18 Jan 2017 18:50:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 886242861D; Wed, 18 Jan 2017 18:50:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3A291285B9 for ; Wed, 18 Jan 2017 18:50:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753305AbdARSur (ORCPT ); Wed, 18 Jan 2017 13:50:47 -0500 Received: from mga04.intel.com ([192.55.52.120]:22799 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753199AbdARSuC (ORCPT ); Wed, 18 Jan 2017 13:50:02 -0500 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP; 18 Jan 2017 10:48:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,250,1477983600"; d="scan'208";a="50141850" Received: from spandruv-desk.jf.intel.com ([10.54.75.13]) by orsmga004.jf.intel.com with ESMTP; 18 Jan 2017 10:48:35 -0800 From: Srinivas Pandruvada To: rjw@rjwysocki.net, len.brown@intel.com Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Srinivas Pandruvada Subject: [PATCH 2/4] cpufreq: intel_pstate: Lower frequency than expected under no_turbo Date: Wed, 18 Jan 2017 10:48:23 -0800 Message-Id: <1484765305-185352-3-git-send-email-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484765305-185352-1-git-send-email-srinivas.pandruvada@linux.intel.com> References: <1484765305-185352-1-git-send-email-srinivas.pandruvada@linux.intel.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When turbo is not disabled by BIOS, but user disabled from intel P-State sysfs and changes max/min using cpufreq sysfs, the resultant frequency is lower than what user requested. The reason for this, when the perf limits are calculated in set_policy() callback, they are with reference to max cpu frequency (turbo frequency ), but when enforced in the intel_pstate_get_min_max() they are with reference to max available performance as documented in the intel_pstate documentation (in this case max non turbo P-State). This needs similar change as done in intel_cpufreq_verify_policy() for passive mode. Set policy->cpuinfo.max_freq based on the turbo status. Signed-off-by: Srinivas Pandruvada --- drivers/cpufreq/intel_pstate.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index a54d65a..a5f1a04 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -2042,6 +2042,20 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) static int intel_pstate_verify_policy(struct cpufreq_policy *policy) { + struct cpudata *cpu = all_cpu_data[policy->cpu]; + struct perf_limits *perf_limits; + + if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) + perf_limits = &performance_limits; + else + perf_limits = &powersave_limits; + + update_turbo_state(); + policy->cpuinfo.max_freq = perf_limits->turbo_disabled || + perf_limits->no_turbo ? + cpu->pstate.max_freq : + cpu->pstate.turbo_freq; + cpufreq_verify_within_cpu_limits(policy); if (policy->policy != CPUFREQ_POLICY_POWERSAVE &&