From patchwork Sat May 19 17:34:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taniya Das X-Patchwork-Id: 10412921 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6C7C56032C for ; Sat, 19 May 2018 17:35:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D11F28479 for ; Sat, 19 May 2018 17:35:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5167928680; Sat, 19 May 2018 17:35:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F35628479 for ; Sat, 19 May 2018 17:35:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752534AbeESRfX (ORCPT ); Sat, 19 May 2018 13:35:23 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:33966 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752322AbeESRfS (ORCPT ); Sat, 19 May 2018 13:35:18 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 98C45602BA; Sat, 19 May 2018 17:35:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526751317; bh=j4RwO4rlml8WPaZF6n2wBDMQ2qXRos7U/SMdWBSnhx4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nvv8mng/fYmzetJpwKumWs9V5xqjVBPpjY9RhAHVNXfFPNCKL+OmOIrl1J4ajKTVN XjFAXNXtnH7c/s7KfLy0XtocNHZwbHhqKWVpVm6gLTfOwcO33vIKKTm5INGLglmXtP BR69rH5xOO6wioip0CBlA1Gcgse/g4P6wy9Vu3UY= Received: from tdas-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tdas@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id F04A1602BC; Sat, 19 May 2018 17:35:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526751317; bh=j4RwO4rlml8WPaZF6n2wBDMQ2qXRos7U/SMdWBSnhx4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nvv8mng/fYmzetJpwKumWs9V5xqjVBPpjY9RhAHVNXfFPNCKL+OmOIrl1J4ajKTVN XjFAXNXtnH7c/s7KfLy0XtocNHZwbHhqKWVpVm6gLTfOwcO33vIKKTm5INGLglmXtP BR69rH5xOO6wioip0CBlA1Gcgse/g4P6wy9Vu3UY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F04A1602BC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=tdas@codeaurora.org From: Taniya Das To: "Rafael J. Wysocki" , Viresh Kumar , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Stephen Boyd , robh@kernel.org Cc: Rajendra Nayak , Amit Nischal , devicetree@vger.kernel.org, skannan@codeaurora.org, amit.kucheria@linaro.org, Taniya Das Subject: [PATCH v2 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW bindings Date: Sat, 19 May 2018 23:04:50 +0530 Message-Id: <1526751291-17873-2-git-send-email-tdas@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526751291-17873-1-git-send-email-tdas@codeaurora.org> References: <1526751291-17873-1-git-send-email-tdas@codeaurora.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's SoCs. This is required for managing the cpu frequency transitions which are controlled by firmware. Signed-off-by: Taniya Das --- .../bindings/cpufreq/cpufreq-qcom-fw.txt | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation. diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt new file mode 100644 index 0000000..bc912f4 --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt @@ -0,0 +1,68 @@ +Qualcomm Technologies, Inc. CPUFREQ Bindings + +CPUFREQ FW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI) +SoCs to manage frequency in hardware. It is capable of controlling frequency +for multiple clusters. + +Properties: +- compatible + Usage: required + Value type: + Definition: must be "qcom,cpufreq-fw". + +Note that #address-cells, #size-cells, and ranges shall be present to ensure +the cpufreq can address a freq-domain registers. + +A freq-domain sub-node would be defined for the cpus with the following +properties: + +- compatible: + Usage: required + Value type: + Definition: must be "cpufreq". + +- reg + Usage: required + Value type: + Definition: Addresses and sizes for the memory of the perf_base + , lut_base and en_base. +- reg-names + Usage: required + Value type: + Definition: Address names. Must be "perf_base", "lut_base", + "en_base". + Must be specified in the same order as the + corresponding addresses are specified in the reg + property. + +- qcom,cpulist + Usage: required + Value type: + Definition: List of related cpu handles which are under a cluster. + +Example: + qcom,cpufreq-fw { + compatible = "qcom,cpufreq-fw"; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + freq-domain-0 { + compatible = "cpufreq"; + reg = <0x17d43920 0x4>, + <0x17d43110 0x500>, + <0x17d41000 0x4>; + reg-names = "perf_base", "lut_base", "en_base"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; + }; + + freq-domain-1 { + compatible = "cpufreq"; + reg = <0x17d46120 0x4>, + <0x17d45910 0x500>, + <0x17d45800 0x4>; + reg-names = "perf_base", "lut_base", "en_base"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; + }; + };