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Mon, 6 May 2019 15:12:18 +0000 (GMT) From: Lukasz Luba To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org, cw00.choi@samsung.com, kyungmin.park@samsung.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, myungjoo.ham@samsung.com, keescook@chromium.org, tony@atomide.com, jroedel@suse.de, treding@nvidia.com, digetx@gmail.com, willy.mh.wolff.ml@gmail.com, Lukasz Luba Subject: [PATCH v7 11/13] ARM: dts: exynos: add syscon to clock compatible Date: Mon, 6 May 2019 17:11:59 +0200 Message-Id: <1557155521-30949-12-git-send-email-l.luba@partner.samsung.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557155521-30949-1-git-send-email-l.luba@partner.samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSaUgUUQDu7czszoor0yr5MFNaSExqrbR4kIQdxLiCmtCfFGrLwXPVdtQ0 pVaLUvPKrGS9UhNFk12PTMUj1yu8xcjKI1Os8CrzKC0r19nq3/e+k/d4JCZuISxI/+AwRhks D5LwjfCajrW+/UNuA94HZmYPo4pMDYGGlz8SKK+tj0Bli1MA3evK4aGeOwqUOjWLof5+rQD1 xs0J0FuVJRqqz+ajpeQ2gDL7m3iovG1MgEZiS/iode42gZpfytDIDxO0+mISOJvSqyvpOJ2l GsTpOvWYgK4sTeDTyTcW+HTLQgOPTqkuBXRVdzS9VGnlITxn5OTDBPlHMEr7YxeM/IYy7wtC XxGR31JOq8AonghIElKOMEMVkAiEpJgqAfCdWpkIjDbxMoBNqUk87rAEYNbXLELv0gcKsicJ TigGcPhuEfgX6Sh6ulXLp6SwtvSyPmBGRcPR4WZM78GoOR7sXf+O6wVTSgbXphu3ME7tgdrn sVsLIsoVqqaaBdyaFXzTl4DpsXCT34jXAY4fF8D8cXPuCqdgUbaBNoUzndWGqCX8XZfH4zAL Vcn5Bk8MnErNMXiOwtbOQUJfg1F7oabenqOPw4ZiLcG1m8DX89v1NLYJ02seYhwtgvG3xJzb FlYnDRiGdsDiJw8M5TT8HK8RcI+TC+DE2jRIA9bq/2OPACgF5kw4q/BlWIdg5oqUlSvY8GBf 6aUQRSXY/FjdvzpXakHTz4s6QJFAYixKOzHgLSbkEWyUQgcgiUnMRPIPfd5ikY886iqjDDmv DA9iWB3YSeISc1H0tgkvMeUrD2MCGSaUUf5VeaTQQgU8ZIoCV43ycW5uwe4MZ7XUzfOQ1DEX t3Q/66LVFerqLXp2uSzVy7xs3ocotEEaauVMMWVVnu8eIwpbd+0cXWyPO9LalVUV8Myp0fe6 aN9od4mng9orxjnetqJ9Y964XROZVBY9XygN9E8nbOy+3PTMM5axYepPVsy1k9PWwnYJzvrJ D9phSlb+B5lMdQFUAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsVy+t/xu7qX/C7EGPRvNLPYOGM9q8X1L89Z LeYfOcdqsfrjY0aLyafmMlmc6c616H/8mtni/PkN7BZnm96wW9xqkLG4vGsOm8Xn3iOMFjPO 72OyWHvkLrvF7cYVbBaH37SzWuy/4mVx+zefxbcTjxgdhD2+fZ3E4jG74SKLx85Zd9k9Nq3q ZPPobX7H5nHw3R4mj74tqxg9Np+u9vi8SS6AM0rPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jE Us/Q2DzWyshUSd/OJiU1J7MstUjfLkEv4/KMqewF11grvve5NTDeYeli5OSQEDCRWDTnEWsX IxeHkMBSRon+I0eYIRJiEpP2bWeHsIUl/lzrYoMo+sQocWbpOcYuRg4ONgE9iR2rCkFqRATq JfrfXAKrYRZoYJZYs/0qK0hCWMBL4ufTvWDbWARUJTYcaASL8wp4SzQ83g+1QE7i5rlOsMWc QPG/HYcYQWwhoN59H3+zTGDkW8DIsIpRJLW0ODc9t9hQrzgxt7g0L10vOT93EyMwkrYd+7l5 B+OljcGHGAU4GJV4eB/YXogRYk0sK67MPcQowcGsJMKb+OxcjBBvSmJlVWpRfnxRaU5q8SFG U6CjJjJLiSbnA6M8ryTe0NTQ3MLS0NzY3NjMQkmct0PgYIyQQHpiSWp2ampBahFMHxMHp1QD o+AEvgOd7mYz3LxuFKhN0Ljme+VTsVy65+63fqdsvBYJee052pYVV2qjmvx76u1Flqu4V/8+ dePLMt/5yx6LnctdX3hnLYvb68fyU5Te9j15nHy96N/sd6wyn9f+73n9bu5JLe4nu275mr2Z dfW7RUaILRPnRpF7bdstF3NGK7d+YxDzidx84pISS3FGoqEWc1FxIgAgNvkTugIAAA== X-CMS-MailID: 20190506151219eucas1p2feab00f7b7c1c5fdd5614423fb38eae2 X-Msg-Generator: CA X-RootMTR: 20190506151219eucas1p2feab00f7b7c1c5fdd5614423fb38eae2 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190506151219eucas1p2feab00f7b7c1c5fdd5614423fb38eae2 References: <1557155521-30949-1-git-send-email-l.luba@partner.samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order get the clock by phandle and use it with regmap it needs to be compatible with syscon. The DMC driver uses two registers from clock register set and needs the regmap of them. Signed-off-by: Lukasz Luba --- arch/arm/boot/dts/exynos5800.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi index 57d3b31..0a2b328 100644 --- a/arch/arm/boot/dts/exynos5800.dtsi +++ b/arch/arm/boot/dts/exynos5800.dtsi @@ -17,7 +17,7 @@ }; &clock { - compatible = "samsung,exynos5800-clock"; + compatible = "samsung,exynos5800-clock", "syscon"; }; &cluster_a15_opp_table {