From patchwork Tue Nov 26 13:12:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11262247 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DCA3D6C1 for ; Tue, 26 Nov 2019 13:13:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C66042075C for ; Tue, 26 Nov 2019 13:13:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727991AbfKZNNm (ORCPT ); Tue, 26 Nov 2019 08:13:42 -0500 Received: from esa1.microchip.iphmx.com ([68.232.147.91]:58371 "EHLO esa1.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727939AbfKZNNk (ORCPT ); Tue, 26 Nov 2019 08:13:40 -0500 Received-SPF: Pass (esa1.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa1.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa1.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa1.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa1.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: XiOjbIzyGIYGLlR6oFCL9F3FMjAvrkL5wWcHUhMGN5gPr8KZNoSU2Ps/fk3WtIeBJqkdTYLrH4 sM/3pNWY944XoWp/V56gJFJG/aAlnlFpyY+d7JA6wAOHqej9P8/aeL4tfiuanI7xpRGg9AfmJB +S/+M6z36Gs+sUZKYncqroTtc4/bJJ+0NHyx4mmkT72+ybU5EOW/mbJhSTm27lLF4rBZj0DQu/ /fRU1IzncWQAak9uMWtK1UNaNcWtIdbEziJa1cA1ClEJVgFHh4ZXHbBqhszC2Thdk9hGGEumgf hdc= X-IronPort-AV: E=Sophos;i="5.69,245,1571727600"; d="scan'208";a="59777420" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 26 Nov 2019 06:13:38 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Tue, 26 Nov 2019 06:13:35 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Tue, 26 Nov 2019 06:13:32 -0700 From: Claudiu Beznea To: , , , , CC: , , , Tudor Ambarus Subject: [PATCH v2 16/17] ARM: at91/defconfig: enable config flag for ATMEL QUADSPI Date: Tue, 26 Nov 2019 15:12:20 +0200 Message-ID: <1574773941-20649-17-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1574773941-20649-1-git-send-email-claudiu.beznea@microchip.com> References: <1574773941-20649-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Tudor Ambarus Enable config flag for ATMEL QUADSPI. This IP is available on SAM9X60 SoC. Signed-off-by: Tudor Ambarus --- arch/arm/configs/at91_dt_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index 011400f926b0..51c91af0a19a 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig @@ -50,6 +50,7 @@ CONFIG_MTD_BLOCK=y CONFIG_MTD_DATAFLASH=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_NAND_ATMEL=y +CONFIG_MTD_SPI_NOR=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_GLUEBI=y CONFIG_BLK_DEV_LOOP=y @@ -110,6 +111,7 @@ CONFIG_I2C_AT91=y CONFIG_I2C_GPIO=y CONFIG_SPI=y CONFIG_SPI_ATMEL=y +CONFIG_SPI_ATMEL_QUADSPI=y CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC is not set CONFIG_POWER_SUPPLY=y