From patchwork Fri Nov 29 13:51:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11267131 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4AEAA175D for ; Fri, 29 Nov 2019 13:52:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 31F86217D6 for ; Fri, 29 Nov 2019 13:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727177AbfK2Nwp (ORCPT ); Fri, 29 Nov 2019 08:52:45 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:53553 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726878AbfK2Nwp (ORCPT ); Fri, 29 Nov 2019 08:52:45 -0500 Received-SPF: Pass (esa5.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa5.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa5.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa5.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa5.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: vDs07NM9Rv/0ASGXI7k+bqfyRXNiWtc4rLdQH9CADz+6xGxttqLAl1tF4/91TEgpyStygnZH4U M9dwT7sRbWaXEK8WcfayobvaUMc92by7N5i/1gMp0TBi82gr7tAnwDXJ6d44WcEy8ZYgzSLTlK 9IRE/WgxLuSiyXqkxDMk1pxnBiu5hVSGTaR2BKT0MshhL1lowaRljUTIQGg/3h+S1u8fQxHnQN Nx1k2Us0jNeGrD9chnR+62dT7vfqVtDhXCrWyRgTF1YinmxkaAFBycae2X8k7E7DkotmX4NHA8 8ro= X-IronPort-AV: E=Sophos;i="5.69,257,1571727600"; d="scan'208";a="57288017" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 29 Nov 2019 06:52:28 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 29 Nov 2019 06:52:09 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Fri, 29 Nov 2019 06:52:07 -0700 From: Claudiu Beznea To: , , , , CC: , , , Claudiu Beznea Subject: [PATCH v3 6/9] drivers: soc: atmel: select POWER_RESET_AT91_SAMA5D2_SHDWC for sam9x60 Date: Fri, 29 Nov 2019 15:51:42 +0200 Message-ID: <1575035505-6310-7-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575035505-6310-1-git-send-email-claudiu.beznea@microchip.com> References: <1575035505-6310-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Select POWER_RESET_AT91_SAMA5D2_SHDWC for SAM9X60 SoC. Signed-off-by: Claudiu Beznea --- drivers/power/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index 886e60017f4d..ff81d02740c2 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -34,7 +34,7 @@ config POWER_RESET_AT91_RESET config POWER_RESET_AT91_SAMA5D2_SHDWC tristate "Atmel AT91 SAMA5D2-Compatible shutdown controller driver" depends on ARCH_AT91 - default SOC_SAMA5 + default SOC_SAM9X60 || SOC_SAMA5 help This driver supports the alternate shutdown controller for some Atmel SAMA5 SoCs. It is present for example on SAMA5D2 SoC.