From patchwork Mon Oct 26 08:19:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Yuan X-Patchwork-Id: 11855991 X-Patchwork-Delegate: viresh.linux@gmail.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6A78B139F for ; Mon, 26 Oct 2020 08:19:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45076223FD for ; Mon, 26 Oct 2020 08:19:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="ceahJheC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1770816AbgJZITV (ORCPT ); Mon, 26 Oct 2020 04:19:21 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54744 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1736790AbgJZITU (ORCPT ); Mon, 26 Oct 2020 04:19:20 -0400 X-UUID: dc875c41c5794d33bc8409725bcdc169-20201026 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=OorCNuODuPaiqUDoyfpo5/p6Zg42Hars9OJsK2xA+SI=; b=ceahJheCV8fb+NTqM72bAML1hCQY1KhM++jEQ8eNIYLgLL/TEAJEfPELt8HgS2Qwmii1CcNvtLgkqZbeQSrkggnfZA1qG6O/hiXKNpqdn3WcuW2DEDottqQyccFRsW6Dw+qLlPM3yGifWZuWBv6KMZdP1Lsexk0M5u+ZehUulqc=; X-UUID: dc875c41c5794d33bc8409725bcdc169-20201026 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2045557172; Mon, 26 Oct 2020 16:19:15 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 26 Oct 2020 16:19:14 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 26 Oct 2020 16:19:14 +0800 From: Hector Yuan To: , , , Rob Herring , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Maxime Ripard , Santosh Shilimkar , Amit Kucheria , Stephen Boyd , Ulf Hansson , Dave Gerlach , Florian Fainelli , Robin Murphy , Lorenzo Pieralisi , CC: , , Subject: [PATCH v8 2/3] dt-bindings: arm: cpus: Document 'mediatek,freq-domain' property Date: Mon, 26 Oct 2020 16:19:08 +0800 Message-ID: <1603700349-5922-3-git-send-email-hector.yuan@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1603700349-5922-1-git-send-email-hector.yuan@mediatek.com> References: <1603700349-5922-1-git-send-email-hector.yuan@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: "Hector.Yuan" Add devicetree documentation for 'mediatek,freq-domain' property specific to Mediatek CPUs. This property is used to reference the CPUFREQ node along with the domain id. Signed-off-by: Hector.Yuan --- Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 1222bf1..e995b26 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -255,6 +255,12 @@ properties: where voltage is in V, frequency is in MHz. + mediatek,freq-domain: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + CPUs supporting freq-domain must set their "mediatek,freq-domain" property + with phandle to a cpufreq_hw node followed by the domain id. + power-domains: $ref: '/schemas/types.yaml#/definitions/phandle-array' description: