From patchwork Fri Jan 13 06:17:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiYuan Huang X-Patchwork-Id: 13100176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2EB9C54EBE for ; Fri, 13 Jan 2023 06:58:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240961AbjAMG65 (ORCPT ); Fri, 13 Jan 2023 01:58:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231154AbjAMG47 (ORCPT ); Fri, 13 Jan 2023 01:56:59 -0500 Received: from mg.richtek.com (mg.richtek.com [220.130.44.152]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id A454F81C26; Thu, 12 Jan 2023 22:42:28 -0800 (PST) X-MailGates: (compute_score:DELIVER,40,3) Received: from 192.168.8.21 by mg.richtek.com with MailGates ESMTP Server V3.0(2734:0:AUTH_RELAY) (envelope-from ); Fri, 13 Jan 2023 14:23:39 +0800 (CST) X-MailGates: (compute_score:DELIVER,40,3) Received: from 192.168.10.46 by mg.richtek.com with MailGates ESMTP Server V5.0(16476:0:AUTH_RELAY) (envelope-from ); Fri, 13 Jan 2023 14:17:48 +0800 (CST) Received: from ex4.rt.l (192.168.10.47) by ex3.rt.l (192.168.10.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.20; Fri, 13 Jan 2023 14:17:47 +0800 Received: from linuxcarl2.richtek.com (192.168.10.154) by ex4.rt.l (192.168.10.45) with Microsoft SMTP Server id 15.2.1118.20 via Frontend Transport; Fri, 13 Jan 2023 14:17:47 +0800 From: To: , , CC: , , , , , Subject: [PATCH RESEND v8 3/3] Documentation: power: rt9471: Document exported sysfs entries Date: Fri, 13 Jan 2023 14:17:46 +0800 Message-ID: <1673590666-24618-4-git-send-email-cy_huang@richtek.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673590666-24618-1-git-send-email-cy_huang@richtek.com> References: <1673590666-24618-1-git-send-email-cy_huang@richtek.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: ChiYuan Huang Document the settings exported by rt9471 charger driver through sysfs entries: - sysoff_enable - port_detect_enable Signed-off-by: ChiYuan Huang --- Since v6: - Explain more details for sysoff_enable attribute. Since v5: - Recover all the change in sysfs-class-power. - New a sysfs-class-power-rt9471 file. - Remove 'charge_term_enable' sysfs entry, directly integrate it in 'charge_term_current' power supply property control. --- Documentation/ABI/testing/sysfs-class-power-rt9471 | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-class-power-rt9471 diff --git a/Documentation/ABI/testing/sysfs-class-power-rt9471 b/Documentation/ABI/testing/sysfs-class-power-rt9471 new file mode 100644 index 00000000..38227a8 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-class-power-rt9471 @@ -0,0 +1,32 @@ +What: /sys/class/power_supply/rt9471-*/sysoff_enable +Date: Oct 2022 +KernelVersion: 6.1 +Contact: ChiYuan Huang +Description: + This entry allows enabling the sysoff mode of rt9471 charger devices. + If enabled and the input is removed, the internal battery FET is turned + off to reduce the leakage from the BAT pin. See device datasheet for details. + It's commonly used when the product enter shipping stage. After entering + shipping mode, only 'VBUS' or 'Power key" pressed can make it leave this + mode. 'Disable' also can help to leave it, but it's more like to abort + the action before the device really enter shipping mode. + + Access: Read, Write + Valid values: + - 1: enabled + - 0: disabled + +What: /sys/class/power_supply/rt9471-*/port_detect_enable +Date: Oct 2022 +KernelVersion: 6.1 +Contact: ChiYuan Huang +Description: + This entry allows enabling the USB BC12 port detect function of rt9471 charger + devices. If enabled and VBUS is inserted, device will start to do the BC12 + port detect and report the usb port type when port detect is done. See + datasheet for details. Normally controlled when TypeC/USBPD port integrated. + + Access: Read, Write + Valid values: + - 1: enabled + - 0: disabled