| Message ID | 20181109195700.28321-1-alexandre.belloni@bootlin.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | power: reset: ocelot: switch the SI to boot mode | expand |
Hi, On Fri, Nov 09, 2018 at 08:57:00PM +0100, Alexandre Belloni wrote: > Switch the SI to boot mode so on a warm reboot, the SI is able to access > the flash. > > Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > --- Thanks, queued. -- Sebastian > drivers/power/reset/ocelot-reset.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/power/reset/ocelot-reset.c b/drivers/power/reset/ocelot-reset.c > index 5a13a5cc8188..419952c61fd0 100644 > --- a/drivers/power/reset/ocelot-reset.c > +++ b/drivers/power/reset/ocelot-reset.c > @@ -26,6 +26,13 @@ struct ocelot_reset_context { > > #define SOFT_CHIP_RST BIT(0) > > +#define ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL 0x24 > +#define IF_SI_OWNER_MASK GENMASK(1, 0) > +#define IF_SI_OWNER_SISL 0 > +#define IF_SI_OWNER_SIBM 1 > +#define IF_SI_OWNER_SIMC 2 > +#define IF_SI_OWNER_OFFSET 4 > + > static int ocelot_restart_handle(struct notifier_block *this, > unsigned long mode, void *cmd) > { > @@ -37,6 +44,11 @@ static int ocelot_restart_handle(struct notifier_block *this, > regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_RESET, > CORE_RST_PROTECT, 0); > > + /* Make the SI back to boot mode */ > + regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL, > + IF_SI_OWNER_MASK << IF_SI_OWNER_OFFSET, > + IF_SI_OWNER_SIBM << IF_SI_OWNER_OFFSET); > + > writel(SOFT_CHIP_RST, ctx->base); > > pr_emerg("Unable to restart system\n"); > -- > 2.19.1 >
diff --git a/drivers/power/reset/ocelot-reset.c b/drivers/power/reset/ocelot-reset.c index 5a13a5cc8188..419952c61fd0 100644 --- a/drivers/power/reset/ocelot-reset.c +++ b/drivers/power/reset/ocelot-reset.c @@ -26,6 +26,13 @@ struct ocelot_reset_context { #define SOFT_CHIP_RST BIT(0) +#define ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL 0x24 +#define IF_SI_OWNER_MASK GENMASK(1, 0) +#define IF_SI_OWNER_SISL 0 +#define IF_SI_OWNER_SIBM 1 +#define IF_SI_OWNER_SIMC 2 +#define IF_SI_OWNER_OFFSET 4 + static int ocelot_restart_handle(struct notifier_block *this, unsigned long mode, void *cmd) { @@ -37,6 +44,11 @@ static int ocelot_restart_handle(struct notifier_block *this, regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_RESET, CORE_RST_PROTECT, 0); + /* Make the SI back to boot mode */ + regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL, + IF_SI_OWNER_MASK << IF_SI_OWNER_OFFSET, + IF_SI_OWNER_SIBM << IF_SI_OWNER_OFFSET); + writel(SOFT_CHIP_RST, ctx->base); pr_emerg("Unable to restart system\n");
Switch the SI to boot mode so on a warm reboot, the SI is able to access the flash. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> --- drivers/power/reset/ocelot-reset.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)