From patchwork Fri Dec 14 22:16:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10731751 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A9D4413BF for ; Fri, 14 Dec 2018 22:16:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 67C202BCE6 for ; Fri, 14 Dec 2018 22:16:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5C1202BE4E; Fri, 14 Dec 2018 22:16:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 155672BCE6 for ; Fri, 14 Dec 2018 22:16:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730145AbeLNWQr (ORCPT ); Fri, 14 Dec 2018 17:16:47 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:52620 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729341AbeLNWQq (ORCPT ); Fri, 14 Dec 2018 17:16:46 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 44D53607DF; Fri, 14 Dec 2018 22:16:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1544825806; bh=zSVbnT211XgLlf6IyfqXczxc6LCDKKSAWRrjPO9WRbY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kIyrEfXN6hbBBFRL1EAZD7m2LPatgYsprbNEi2ur01Aeqw2H8FJDA2DLXo74BBv7/ gmTjhj3OZhOdv4o7EBzdRvhVRPwuxBY6WwQDOqm+KSyT4jmiyRhs4t3vjbIf2Fhowc VG01sG1lbE3T4MvkEfIIXMcg1P1na2h18/VJsEU8= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A8897601D7; Fri, 14 Dec 2018 22:16:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1544825805; bh=zSVbnT211XgLlf6IyfqXczxc6LCDKKSAWRrjPO9WRbY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TlSpr1a+f1VBKzxqj3x3MNsQ2hU3NZFozQ/6+/mRvJBSZ+m5fBZg3NZsDRArOvYwj 3YDcXjZUvCHIxd5aDI2UYAZ6+Zf4xrnAezGejvoMZRzNukf2q9tUi7n44F+P7rMJHl 7wQXycwhvf41EaD+/r07J2rz9BPTlzsd748i34dA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A8897601D7 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: nm@ti.com, devicetree@vger.kernel.org, rnayak@codeaurora.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, dianders@chromium.org, vireshk@kernel.org, linux-arm-kernel@lists.infradead.org, georgi.djakov@linaro.org Subject: [PATCH v2 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU Date: Fri, 14 Dec 2018 15:16:39 -0700 Message-Id: <20181214221640.25354-2-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181214221640.25354-1-jcrouse@codeaurora.org> References: <20181214221640.25354-1-jcrouse@codeaurora.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Jordan Crouse Reviewed-by: Douglas Anderson --- Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 8d9415180c22..19b5ae459fdb 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -19,6 +19,9 @@ Required properties: * "mem_iface" - iommus: optional phandle to an adreno iommu instance - operating-points-v2: optional phandle to the OPP operating points +- interconnect: optional phandle to a interconnect provider. See + ../interconnect/interconnect.txt for details. +- interconnect-names: Name string for the interconnects. - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will control the power for the GPU @@ -68,6 +71,9 @@ Example a6xx (with GMU): operating-points-v2 = <&gpu_opp_table>; + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; + interconnect-names = "gfx-mem"; + qcom,gmu = <&gmu>; }; };