From patchwork Mon Mar 23 12:15:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Kao X-Patchwork-Id: 11452797 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E6EFC174A for ; Mon, 23 Mar 2020 12:16:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C5F902080C for ; Mon, 23 Mar 2020 12:16:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="m4wa/aWu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727447AbgCWMPp (ORCPT ); Mon, 23 Mar 2020 08:15:45 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54031 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727377AbgCWMPo (ORCPT ); Mon, 23 Mar 2020 08:15:44 -0400 X-UUID: df17da0d8b6345b7aeef52b08729b011-20200323 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=t4KDU3gSGbmIBW1rfyL1Ets87sk3PSbQi3QOVB4Qbp0=; b=m4wa/aWu/KVS6/eZ2BS+RbH2oPKQiHlKWukwP93/jOan0aFMkJFqWdRHEE05Z+qilQgu/Jn2hSP/q7rf1DM0r220s4TOsF+Kx35YugPkp0hdDU1Rf7j3vpvvO4Ds3q7geOnJeLNxkHQhOxP831NbO8vdtnvjfcyAGvXk/QQhLyo=; X-UUID: df17da0d8b6345b7aeef52b08729b011-20200323 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1546018266; Mon, 23 Mar 2020 20:15:40 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 23 Mar 2020 20:14:29 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 23 Mar 2020 20:15:38 +0800 From: Michael Kao To: Matthias Brugger , Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , , , , CC: , , , Subject: [v4,2/7] arm64: dts: mt8183: add dynamic power coefficients Date: Mon, 23 Mar 2020 20:15:32 +0800 Message-ID: <20200323121537.22697-3-michael.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200323121537.22697-1-michael.kao@mediatek.com> References: <20200323121537.22697-1-michael.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: "michael.kao" Add dynamic power coefficients for all cores and update those of CPU0 and CPU4. Signed-off-by: Michael Kao --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 59f97217aaa8..2e2527c3369a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -75,6 +75,7 @@ reg = <0x000>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu1: cpu@1 { @@ -83,6 +84,7 @@ reg = <0x001>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu2: cpu@2 { @@ -91,6 +93,7 @@ reg = <0x002>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu3: cpu@3 { @@ -99,6 +102,7 @@ reg = <0x003>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu4: cpu@100 { @@ -107,6 +111,7 @@ reg = <0x100>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; cpu5: cpu@101 { @@ -115,6 +120,7 @@ reg = <0x101>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; cpu6: cpu@102 { @@ -123,6 +129,7 @@ reg = <0x102>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; cpu7: cpu@103 { @@ -131,6 +138,7 @@ reg = <0x103>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; };