diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
index ccd44d0418f8..1fb8f0480be3 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
@@ -4,6 +4,7 @@
 #include <linux/completion.h>
 #include <linux/circ_buf.h>
 #include <linux/list.h>
+#include <soc/qcom/icc.h>
 
 #include "a6xx_gmu.h"
 #include "a6xx_gmu.xml.h"
@@ -320,24 +321,18 @@ static void a640_build_bw_table(struct a6xx_hfi_msg_bw_table *msg)
 	msg->cnoc_cmds_data[1][2] =  0x60000001;
 }
 
-static void a650_build_bw_table(struct a6xx_hfi_msg_bw_table *msg)
+static void a650_build_bw_table(struct a6xx_hfi_msg_bw_table *msg, struct icc_path *path)
 {
 	/*
 	 * Send a single "off" entry just to get things running
 	 * TODO: bus scaling
 	 */
-	msg->bw_level_num = 1;
-
-	msg->ddr_cmds_num = 3;
+	msg->bw_level_num = 2;
 	msg->ddr_wait_bitmask = 0x01;
 
-	msg->ddr_cmds_addrs[0] = 0x50000;
-	msg->ddr_cmds_addrs[1] = 0x50004;
-	msg->ddr_cmds_addrs[2] = 0x5007c;
-
-	msg->ddr_cmds_data[0][0] =  0x40000000;
-	msg->ddr_cmds_data[0][1] =  0x40000000;
-	msg->ddr_cmds_data[0][2] =  0x40000000;
+	msg->ddr_cmds_num = qcom_icc_query_addr(path, msg->ddr_cmds_addrs);
+	qcom_icc_query_cmd(path, msg->ddr_cmds_data[0], 0, 0);
+	qcom_icc_query_cmd(path, msg->ddr_cmds_data[1], 0, 7216000);
 
 	/*
 	 * These are the CX (CNOC) votes - these are used by the GMU but the
@@ -388,7 +383,6 @@ static void a6xx_build_bw_table(struct a6xx_hfi_msg_bw_table *msg)
 	msg->cnoc_cmds_data[1][2] =  0x60000001;
 }
 
-
 static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu)
 {
 	struct a6xx_hfi_msg_bw_table msg = { 0 };
@@ -400,7 +394,7 @@ static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu)
 	else if (adreno_is_a640(adreno_gpu))
 		a640_build_bw_table(&msg);
 	else if (adreno_is_a650(adreno_gpu))
-		a650_build_bw_table(&msg);
+		a650_build_bw_table(&msg, adreno_gpu->base.icc_path);
 	else
 		a6xx_build_bw_table(&msg);
 
diff --git a/drivers/interconnect/qcom/icc-rpmh.c b/drivers/interconnect/qcom/icc-rpmh.c
index 3ac5182c9ab2..3ce2920330f9 100644
--- a/drivers/interconnect/qcom/icc-rpmh.c
+++ b/drivers/interconnect/qcom/icc-rpmh.c
@@ -9,6 +9,7 @@
 
 #include "bcm-voter.h"
 #include "icc-rpmh.h"
+#include "../internal.h"
 
 /**
  * qcom_icc_pre_aggregate - cleans up stale values from prior icc_set
@@ -92,6 +93,55 @@ int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
 }
 EXPORT_SYMBOL_GPL(qcom_icc_set);
 
+static u32 bcm_query(struct qcom_icc_bcm *bcm, u64 sum_avg, u64 max_peak)
+{
+	u64 temp, agg_peak = 0;
+	int i;
+
+	for (i = 0; i < bcm->num_nodes; i++) {
+		temp = max_peak * bcm->aux_data.width;
+		do_div(temp, bcm->nodes[i]->buswidth);
+		agg_peak = max(agg_peak, temp);
+	}
+
+	temp = agg_peak * 1000ULL;
+	do_div(temp, bcm->aux_data.unit);
+
+	// TODO vote_x
+
+	return BCM_TCS_CMD(true, temp != 0, 0, temp);
+}
+
+int qcom_icc_query_addr(struct icc_path *path, u32 *addr)
+{
+	struct qcom_icc_node *qn;
+	int i, j, k = 0;
+
+	for (i = 0; i < path->num_nodes; i++) {
+		qn = path->reqs[i].node->data;
+		for (j = 0; j < qn->num_bcms; j++, k++)
+			addr[k] = qn->bcms[j]->addr;
+	}
+
+	return k;
+}
+EXPORT_SYMBOL_GPL(qcom_icc_query_addr);
+
+int qcom_icc_query_cmd(struct icc_path *path, u32 *cmd, u64 avg, u64 max)
+{
+	struct qcom_icc_node *qn;
+	int i, j, k = 0;
+
+	for (i = 0; i < path->num_nodes; i++) {
+		qn = path->reqs[i].node->data;
+		for (j = 0; j < qn->num_bcms; j++, k++)
+			cmd[k] = bcm_query(qn->bcms[j], avg, max);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(qcom_icc_query_cmd);
+
 /**
  * qcom_icc_bcm_init - populates bcm aux data and connect qnodes
  * @bcm: bcm to be initialized
diff --git a/include/soc/qcom/icc.h b/include/soc/qcom/icc.h
new file mode 100644
index 000000000000..8d0ddde49739
--- /dev/null
+++ b/include/soc/qcom/icc.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_QCOM_ICC_H__
+#define __SOC_QCOM_ICC_H__
+
+#include <linux/interconnect.h>
+
+int qcom_icc_query_addr(struct icc_path *path, u32 *addr);
+int qcom_icc_query_cmd(struct icc_path *path, u32 *cmd, u64 avg, u64 max);
+
+#endif /* __SOC_QCOM_ICC_H__ */
